Configuration

Configuration
	Chapter 356. STMicroelectronics ST40 Evaluation Board Support

Overview

The ST40EB platform HAL package is loaded automatically when eCos is configured for an st40raeb target. It should never be necessary to load this package explicitly. Unloading the package should only happen as a side effect of switching target hardware.

Startup

The ST40EB platform HAL package supports two separate startup types:

RAM

This is the startup type which is normally used during application development. The board has RedBoot programmed into flash at location 0x80000000/0xA0000000 and boots from that location. sh-elf-gdb is then used to load a RAM startup application into memory and debug it. It is assumed that the hardware has already been initialized by RedBoot. By default the application will use the eCos virtual vectors mechanism to obtain certain services from RedBoot, including diagnostic output.

This startup type can also be used with the configuration option CYGSEM_HAL_USE_ROM_MONITOR disabled to allow eCos applications loaded into RAM to be run using the ST40-Connect and debugged using the SuperH sh4gdb version of GDB in the same way as the RAM version of RedBoot was loaded earlier.

ROM

This startup type can be used for finished applications which will be programmed into flash at location 0x80000000/0xA0000000. The application will be self-contained with no dependencies on services provided by other software. eCos startup code will perform all necessary hardware initialization.

RedBoot and Virtual Vectors

If the application is intended to act as a ROM monitor, providing services for other applications, then the configuration option CYGSEM_HAL_ROM_MONITOR should be set. Typically this option is set only when building RedBoot.

If the application is supposed to make use of services provided by a ROM monitor, via the eCos virtual vector mechanism, then the configuration option CYGSEM_HAL_USE_ROM_MONITOR should be set. By default this option is enabled when building for a RAM startup, disabled otherwise. It can be manually disabled for a RAM startup, making the application self-contained, as a testing step before switching to ROM startup, or for standalone RAM applications loaded and debugged with sh4gdb.

If the application does not rely on a ROM monitor for diagnostic services then serial port COM 0 will be claimed for HAL diagnostics.

Flash Driver

The ST40EB board contains 4M bytes of Flash, specifically, two ST M29W160DB parts in parallel. Each part starts with bootblocks of 16K bytes, 8K bytes, 8K bytes and 32K bytes respectively, followed by 31 blocks of 64K bytes each. These are AMD 29xxxxx compatible parts, and as such the CYGPKG_DEVS_FLASH_AMD_AM29XXXXX package contains all the code necessary to support these parts and the CYGPKG_DEVS_FLASH_SH_ST40EB package contains definitions that customize the driver to the ST40EB board.

Ethernet Driver

The ST40EB board contains an STE10/100A ethernet device. This is largely compatible with Intel i21143/DEC Tulip parts. The device is accessed via the PCI bus. The CYGPKG_DEVS_ETH_INTEL_I21143 package contains all the code necessary to support this part and the CYGPKG_DEVS_ETH_SH_ST40EB package contains definitions that customize the driver to the ST40EB board.

The ethernet will automatically auto-negotiate 10Mbps or 100Mbps operation with its link peer, as well as full duplex or half duplex mode.

The driver usually reads the MAC address (ESA) from the EEPROM connected to the STE. Alternatively an address can be set in the CDL configuration in the component CYGSEM_DEVS_ETH_SH_ST40EB_ETH0_SET_ESA within the ST40EB ethernet driver; or an address can be set in the Flash configuration of RedBoot using the fconfig command. If both are set, the Flash configuration is used in preference.

PCI Driver

The ST40EB board is fitted with three 5V PCI slots, which are accessed via a PCI-PCI bridge, as is the onboard STE10/100A ethernet device. The 3.3V PCI slot is accessed directly. eCos supports PCI devices inserted in these slots and if the PCI library is selected in the eCos configuration, a driver will usually call cyg_pci_init() which will automatically configure memory and I/O base address registers, as well as any interrupts the device requires.

The CPU is able to access the PCI memory space through the memory window from 0xb0000000 to 0xb5ffffff, and the PCI I/O space through the memory window from 0xb6000000 to 0xb6ffffff. PCI devices may access system memory (usually for DMA), at windows starting at address 0x0 in both memory and I/O PCI spaces.

System Clock

By default, the system clock interrupts once every 10ms, corresponding to a 100Hz clock. This can be changed by the configuration option CYGNUM_HAL_RTC_DENOMINATOR which corresponds to the clock frequency. Other clock-related settings are recalculated automatically if the denominator is changed.

Compiler Flags

The platform HAL defines the default compiler and linker flags for all packages, although it is possible to override these on a per-package basis. Most of the flags used are the same as for other architectures supported by eCos. There are two flags specific to this port:

-m4: The sh-elf-gcc compiler supports many variants of the SH architecture, from the SH2 onwards. A -m option should be used to select the specific variant in use, and with current tools -m4 is the correct option for the ST40.


Setup		The HAL Port

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