Abatron BDI3000 notes

On the Abatron BDI3000, the bdi3000.mpc5554demo.cfg file should be used to setup and configure the hardware to an appropriate state to load programs. This includes setting up the TLB, PLL, external SRAM cache and flash memory controller.

The bdi3000.mpc5554demo.cfg file also contains an option to define whether hardware or software breakpoints are used by default, using the BREAKMODE directive in the [TARGET] section. Edit this file if you wish to use software break points, and remember to use the boot command on the BDI3000 command line interface to make the changes take effect.

On the BDI3000, debugging can be performed either via the telnet interface or using powerpc-eabi-gdb and the bdiGDB interface. In the case of the latter, powerpc-eabi-gdb needs to connect to TCP port 2001 on the BDI3000's IP address. For example:

(gdb) target remote 111.222.333.444:2001

By default when the BDI3000 is powered up, the target will always run the initialization section of the bdi3000.mpc5554demo.cfg file (which configures the CPU clock among other things), and halts the target. This behaviour is repeated with the reset halt command.

If the board is reset when in 'reset halt' mode (either with the 'reset halt' or 'reset' commands, or by pressing the reset button) and the 'go' command is then given, then the board will boot from ROM as normal.

It is also possible for the target to always run, without initialization, after the reset button has been pressed. This mode is selected with the reset run command. This conveniently allows the target to be connected to the JTAG debugger, and be able to reset it with the reset button, without being required to always type 'go' every time. Thereafter, invoking the reset command will repeat the previous reset style. Also in this mode, exceptions will be handled by board software, rather than causing the JTAG debugger to halt the CPU.

Suitably configured RAM applications can be loaded either via GDB, or directly via the telnet CLI. For example:

MPC5554>load 0x20000500 test.bin bin
Loading test.bin , please wait ....
Loading program file passed
MPC5554>go 0x20000540

Consult the BDI3000 documentation for information on other formats.

Ronetix PEEDI notes

On the Ronetix PEEDI, the peedi.mpc5554demo.cfg file should be used to setup and configure the hardware to an appropriate state to load programs. This includes setting up the TLB, PLL, external SRAM cache and flash memory controller.

The peedi.mpc5554demo.cfg file also contains an option to define whether hardware or software breakpoints are used by default, using the CORE0_BREAKMODE directive in the [PLATFORM_MPC5500] section. Edit this file if you wish to use software break points, and remember to reset the PEEDI using the reset button or with the reboot command on the PEEDI command line interface to make the changes take effect.

On the PEEDI, debugging can be performed either via the telnet interface or using powerpc-eabi-gdb and the GDB interface. In the case of the latter, powerpc-eabi-gdb needs to connect to TCP port 2000 on the PEEDI's IP address. For example:

(gdb) target remote 111.222.333.444:2000

By default when the PEEDI is powered up, the target will always run the initialization section of the peedi.mpc5554demo.cfg file (which configures the CPU clock among other things), and halts the target. This behaviour is repeated with the reset reset command.

If the board is reset (either with the 'reset', or by pressing the reset button) and the 'go' command is then given, then the board will boot from ROM as normal.

It is also possible for the target to always run, without initialization, after the reset button has been pressed. This mode is selected with the reset run command. This conveniently allows the target to be connected to the JTAG debugger, and be able to reset it with the reset button, without being required to always type 'go' every time. Thereafter, invoking the reset command will repeat the previous reset style. Also in this mode, exceptions will be handled by board software, rather than causing the JTAG debugger to halt the CPU.

Suitably configured RAM applications can be loaded either via GDB, or directly via the telnet CLI. For example:

mpc5554>mem load tftp://192.168.1.1/test.bin bin 0x20000500
++ info: Loading image file:  tftp://192.168.1.1/test.bin
++ info: At absolute address: 0x20000500
loading at 0x20000500
loading at 0x20008500
loading at 0x20010500
loading at 0x20018500

Successfully loaded 128KB (131072 bytes) in 0.3s
mpc5554>go 0x20000540

Consult the PEEDI documentation for information on other formats.

Configuration of JTAG applications

If the JTAG device has initialized the processor, such as by using the peedi.mpc5554.cfg configuration on the PEEDI, or the bdi3000.mpc5554.cfg configuration on the BDI3000, applications can be loaded directly into RAM without requiring a ROM monitor. This loading can be done directly through the JTAG device, or where supported by the JTAG device, through GDB.

In order to configure the application to support this mode, some configuration settings are required. Firstly CYGSEM_HAL_USE_ROM_MONITOR must be disabled. Secondly the CYGDBG_HAL_DIAG_TO_DEBUG_CHAN option should be disabled in order to prevent HAL diagnostic output being encoded into GDB ($O) packets. Selecting the JTAG startup type in the configuration tool sets these options automatically.

Running RAM applications

Once loaded and running via JTAG, HAL diagnostic output will appear by default on eSCI device A.