| Peripheral Clock Control | ||
|---|---|---|
 | Chapter 270. Freescale i.MXxx Processor Support |  |
Name
Peripheral Clock Control — Description
Synopsis
#include <cyg/hal/hal_io.h>
pin = CYGHWR_HAL_IMX_CLOCK(
cgcr
,
device
);
CYGHWR_HAL_IMX_CLOCK_ENABLE
(
desc
);
CYGHWR_HAL_IMX_CLOCK_DISABLE
(
desc
);
Description
The i.MXxx HAL provides a number of macros to support the
management of peripheral clocks. The macro
CYGHWR_HAL_IMX_CLOCK( cgcr, device ) encodes
a clock control descriptor into a 32 bit value. The arguments are
the clock group register name, and the name of the clock to be
controlled.
The remaining functions all take a peripheral clock descriptor as
an argument. CYGHWR_HAL_IMX_CLOCK_ENABLE( desc
) enables the given clock. Likewise
CYGHWR_HAL_IMX_CLOCK_DISABLE( desc ) disables
the clock.
The following examples show how a clock descriptor may be defined.
// EPIT input clock and EPIT1 device clock #define CYGHWR_HAL_IMX_EPIT_PER_CLOCK CYGHWR_HAL_IMX_CLOCK( CGCR0, PER_EPIT ) #define CYGHWR_HAL_IMX_EPIT1_CLOCK CYGHWR_HAL_IMX_CLOCK( CGCR1, IPG_EPIT1 ) // UART1 clock #define CYGHWR_HAL_IMX_UART1_CLOCK CYGHWR_HAL_IMX_CLOCK( CGCR2, IPG_UART1 )
| |  | |
| Pin Configuration and GPIO Support |  | Chapter 271. Freescale MCIMX25WPDK Board Support |
| 2024-12-10 | eCosPro Non-Commercial Public License |