Name

HAL Port — Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the ARM Aarch32 Virtual Machine, and should be read in conjunction with that specification. This HAL package complements the ARM architectural HAL, the Cortex-A variant HAL and the Virtual variant HAL. It provides functionality which is specific to the target hypervisor and the board on which it is running.

Startup

Following a reset, the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

Xvisor VM Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

Virtual Flash
This is located at 0x00000000 and is 32MiB in size. The hypervisor is responsible for loading the initial image, typically RedBoot, in to the start of this region. When the VM is kicked into life execution starts here.
RAM
This is located at address 0x40000000 of the physical memory space and is 32MiB in size. The HAL configures the MMU to retain the RAM at virtual address 0x40000000 with caching enabled. The same memory is also accessible uncached and unbuffered at virtual address 0x50000000 for use by device drivers. ROM applications can use RAM starting at 0x4000000020. Interrupt and exception vectors are placed at 0x40000000 and the virtual vectors occupy 256 bytes at 0x00000050. For ROM startup, all remaining RAM is available. RAM startup applications are loaded from location 0x40200000, reserving 2MiB.
Shared memory
A shared memory region is allocated at address 0x38000000. This area can be mapped to memory shared between the eCos VM and any other VM. It may be used to load applications into the VM using the RedBoot load command and may also be used to enable communications between applications in the eCos VM and the other VM.
Peripheral Registers
These occupy regions of memory at 0x08000000, 0x09000000 and 0x0a000000 of varying sizes. These include the GIC registers, emulated peripherals such as the PL011 UART or VirtIO devices.

The virtual address space visible to applications is summarized in the following table. Any address range not mentioned here should not be accessed and will raise an exception if it is.

BaseSize (MiB)CacheDescription
0x0000000032Disabled Virtual flash.
0x080000001DisabledGIC registers.
0x0900000016DisabledEmulated device registers.
0x0A00000016DisabledVirtIO device registers.
0x3800000016Disabled Shared memory.
0x4000000032EnabledNormal SDRAM access.
0x5000000032DisabledUncached access to RAM.

Real-time Characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM32 mode and run in non-SMP mode on a VCPU bound to host CPU 3 of Xvisor running on a Pine Rockpro64.

Example 263.1. VM Real-time characterization

             Startup, main thrd : stack used   404 size  1792
             Startup :  Interrupt stack used  4096 size  4096
             Startup : Idlethread stack used    96 size  1280

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 1 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took    5.35 microseconds (102 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                  64
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                32
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32
   Stack Size:             1088


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
INFO:<Ctrl-C disabled until test completion>
    1.01    0.68    1.41    0.17   59%  25% Create thread
    0.20    0.00    0.31    0.15   62%  37% Yield thread [all suspended]
    0.35    0.00    0.68    0.09   81%   4% Suspend [suspended] thread
    0.19    0.00    0.31    0.15   59%  40% Resume thread
    0.24    0.00    0.31    0.11   76%  23% Set priority
    0.09    0.00    0.31    0.13   71%  71% Get priority
    0.46    0.31    1.04    0.18   60%  60% Kill [suspended] thread
    0.20    0.00    0.31    0.15   62%  37% Yield [no other] thread
    0.25    0.00    0.31    0.10   81%  18% Resume [suspended low prio] thread
    0.19    0.00    0.31    0.15   59%  40% Resume [runnable low prio] thread
    0.22    0.00    0.31    0.13   71%  28% Suspend [runnable] thread
    0.20    0.00    0.31    0.15   62%  37% Yield [only low prio] thread
    0.19    0.00    0.31    0.15   59%  40% Suspend [runnable->not runnable]
    0.38    0.31    0.68    0.11   81%  81% Kill [runnable] thread
    0.37    0.31    0.68    0.10   84%  84% Destroy [dead] thread
    0.66    0.31    1.04    0.04   92%   6% Destroy [runnable] thread
    1.16    1.04    1.77    0.16   68%  68% Resume [high priority] thread
    0.34    0.31    0.68    0.05   92%  92% Thread switch

    0.07    0.00    0.31    0.11   77%  77% Scheduler lock
    0.17    0.00    0.31    0.16   53%  46% Scheduler unlock [0 threads]
    0.17    0.00    0.31    0.16   53%  46% Scheduler unlock [1 suspended]
    0.17    0.00    0.31    0.16   53%  46% Scheduler unlock [many suspended]
    0.17    0.00    0.31    0.16   53%  46% Scheduler unlock [many low prio]

    0.19    0.00    0.31    0.15   59%  40% Init mutex
    0.23    0.00    0.68    0.16   59%  34% Lock [unlocked] mutex
    0.23    0.00    0.68    0.14   65%  31% Unlock [locked] mutex
    0.21    0.00    0.31    0.14   65%  34% Trylock [unlocked] mutex
    0.16    0.00    0.31    0.16  100%  50% Trylock [locked] mutex
    0.10    0.00    0.31    0.13   68%  68% Destroy mutex
    1.06    1.04    1.41    0.04   93%  93% Unlock/Lock mutex

    0.20    0.00    0.31    0.15   62%  37% Create mbox
    0.21    0.00    0.31    0.13   68%  31% Peek [empty] mbox
    0.24    0.00    0.68    0.13   68%  28% Put [first] mbox
    0.06    0.00    0.31    0.10   81%  81% Peek [1 msg] mbox
    0.20    0.00    0.31    0.15   62%  37% Put [second] mbox
    0.07    0.00    0.31    0.11   78%  78% Peek [2 msgs] mbox
    0.23    0.00    0.68    0.14   65%  31% Get [first] mbox
    0.21    0.00    0.31    0.13   68%  31% Get [second] mbox
    0.18    0.00    0.31    0.15   56%  43% Tryput [first] mbox
    0.21    0.00    0.31    0.13   68%  31% Peek item [non-empty] mbox
    0.21    0.00    0.68    0.16   59%  37% Tryget [non-empty] mbox
    0.20    0.00    0.31    0.15   62%  37% Peek item [empty] mbox
    0.20    0.00    0.31    0.15   62%  37% Tryget [empty] mbox
    0.08    0.00    0.31    0.12   75%  75% Waiting to get mbox
    0.08    0.00    0.31    0.12   75%  75% Waiting to put mbox
    0.09    0.00    0.31    0.13   71%  71% Delete mbox
    0.69    0.31    1.04    0.04   90%   3% Put/Get mbox

    0.16    0.00    0.31    0.16  100%  50% Init semaphore
    0.19    0.00    0.31    0.15   59%  40% Post [0] semaphore
    0.21    0.00    0.31    0.14   65%  34% Wait [1] semaphore
    0.19    0.00    0.31    0.15   59%  40% Trywait [0] semaphore
    0.19    0.00    0.31    0.15   59%  40% Trywait [1] semaphore
    0.09    0.00    0.31    0.13   71%  71% Peek semaphore
    0.08    0.00    0.31    0.12   75%  75% Destroy semaphore
    0.68    0.31    1.04    0.02   93%   3% Post/Wait semaphore

    0.16    0.00    0.31    0.16  100%  50% Create counter
    0.08    0.00    0.31    0.12   75%  75% Get counter value
    0.06    0.00    0.31    0.10   81%  81% Set counter value
    0.23    0.00    0.31    0.12   75%  25% Tick counter
    0.10    0.00    0.31    0.13   68%  68% Delete counter

    0.11    0.00    0.31    0.14   65%  65% Init flag
    0.21    0.00    0.31    0.14   65%  34% Destroy flag
    0.19    0.00    0.31    0.15   59%  40% Mask bits in flag
    0.20    0.00    0.31    0.15   62%  37% Set bits in flag [no waiters]
    0.22    0.00    0.31    0.13   71%  28% Wait for flag [AND]
    0.20    0.00    0.31    0.15   62%  37% Wait for flag [OR]
    0.21    0.00    0.31    0.13   68%  31% Wait for flag [AND/CLR]
    0.21    0.00    0.31    0.13   68%  31% Wait for flag [OR/CLR]
    0.09    0.00    0.31    0.13   71%  71% Peek on flag

    0.11    0.00    0.31    0.14   65%  65% Create alarm
    0.33    0.00    0.68    0.11   71%  12% Initialize alarm
    0.19    0.00    0.31    0.15   59%  40% Disable alarm
    0.24    0.00    0.31    0.11   78%  21% Enable alarm
    0.19    0.00    0.31    0.15   59%  40% Delete alarm
    0.21    0.00    0.31    0.13   68%  31% Tick counter [1 alarm]
    0.67    0.31    0.68    0.02   96%   3% Tick counter [many alarms]
    0.29    0.00    0.31    0.04   93%   6% Tick & fire counter [1 alarm]
    3.82    3.59    3.96    0.17   62%  37% Tick & fire counters [>1 together]
    0.77    0.68    1.04    0.14   75%  75% Tick & fire counters [>1 separately]
   11.19   10.52   12.45    0.33   59%  22% Alarm latency [0 threads]
    5.24    4.90    5.73    0.11   53%   0% Alarm latency [2 threads]
    5.82    5.42    6.46    0.23   56%  32% Alarm latency [many threads]
   11.70   10.89   12.66    0.35   60%  11% Alarm -> thread resume latency

    6.74    3.65   11.35    0.00            Clock/interrupt latency

    0.60    0.36    1.09    0.00            Clock DSR latency

     244     172     288                    Worker thread stack used (stack size 1088)
            All done, main thrd : stack used   884 size  1792
            All done :  Interrupt stack used   136 size  4096
            All done : Idlethread stack used   248 size  1280

Timing complete - 30920 ms total

PASS:<Basic timing OK>
EXIT:<done>

Other Issues

The platform HAL does not affect the implementation of other parts of the eCos HAL specification. The ARM architectural HAL documentation should be consulted for further details.