Name

HAL Port — Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the ARM Aarch32 Virtual Machine, and should be read in conjunction with that specification. This HAL package complements the ARM architectural HAL, the Cortex-A variant HAL and the Virtual variant HAL. It provides functionality which is specific to the target emulator.

Startup

On emulator startup or reset the HAL will initialize or reinitialize those peripherals that are to be used. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

QEMU VM Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

RAM

This is located at address 0x40000000 of the physical memory space and is 32MiB in size. The HAL configures the MMU to retain the RAM at virtual address 0x40000000 with caching enabled. The same memory is also accessible uncached and unbuffered at virtual address 0x50000000 for use by device drivers. ROM applications can use RAM starting at 0x4040000020. Interrupt and exception vectors are placed at 0x40400000 and the virtual vectors occupy 256 bytes at 0x40400050. For ROM startup, all remaining RAM is available. RAM startup applications are loaded from location 0x40500000, reserving 5MiB.

ROM applications are loaded into the bottom 4MiB of RAM, at 0x40010000, which is treated like a read-only memory for this purpose. This, for example, allows RedBoot to perform a reset by jumping to 0x40010000.

Peripheral Registers
These occupy regions of memory at 0x08000000, 0x09000000 and 0x0a000000 of varying sizes. These include the GIC registers, emulated peripherals such as the PL011 UART or VirtIO devices.

The virtual address space visible to applications is summarized in the following table. Any address range not mentioned here should not be accessed and will raise an exception if it is.

BaseSize (MiB)CacheDescription
0x080000001DisabledGIC registers.
0x0900000016DisabledEmulated device registers.
0x0A00000016DisabledVirtIO device registers.
0x4000000032EnabledNormal RAM access.
0x5000000032DisabledUncached access to RAM.

Real-time Characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM32 mode and run in non-SMP mode under QEMU 4.2.0 running under Linux on a 6 processor Intel i7-8700K CPU running at up to 3.70GHz.

Example 262.1. VM Real-time characterization

             Startup, main thrd : stack used   404 size  1792
             Startup :  Interrupt stack used  4096 size  4096
             Startup : Idlethread stack used    96 size  1280

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 25 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took  128.51 microseconds (8031 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                  64
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                32
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32
   Stack Size:             1088


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
INFO:<Ctrl-C disabled until test completion>
    1.78    0.14   52.40    2.73   95%  93% Create thread
    0.69    0.00   44.16    1.36   98%  98% Yield thread [all suspended]
    0.67    0.00   42.62    1.31   98%  98% Suspend [suspended] thread
    0.65    0.00   41.49    1.28   98%  98% Resume thread
    0.70    0.00   44.24    1.36   98%  98% Set priority
    0.22    0.00   14.30    0.44   98%  98% Get priority
    1.77    0.00  112.58    3.46   98%  98% Kill [suspended] thread
    0.17    0.00   11.10    0.34   98%  98% Yield [no other] thread
    0.75    0.00   31.82    1.39   96%  96% Resume [suspended low prio] thread
    0.17    0.00   10.64    0.33   98%  98% Resume [runnable low prio] thread
    0.41    0.00   25.58    0.79   98%  98% Suspend [runnable] thread
    0.10    0.00    5.92    0.20   96%  96% Yield [only low prio] thread
    0.11    0.00    6.72    0.21   98%  98% Suspend [runnable->not runnable]
    0.14    0.00    8.46    0.27   96%  96% Kill [runnable] thread
    2.28    0.06  136.29    4.23   98%  98% Destroy [dead] thread
    0.59    0.29   17.97    0.55   98%  96% Destroy [runnable] thread
    2.47    1.01   45.74    2.50   96%  95% Resume [high priority] thread
    0.44    0.32   11.33    0.18   98%  93% Thread switch

    0.11    0.00   12.06    0.22   98%  98% Scheduler lock
    0.04    0.00    4.58    0.07   99%  99% Scheduler unlock [0 threads]
    0.04    0.00    4.62    0.07   99%  99% Scheduler unlock [1 suspended]
    0.04    0.00    4.98    0.08   99%  99% Scheduler unlock [many suspended]
    0.04    0.00    5.01    0.08   99%  99% Scheduler unlock [many low prio]

    0.70    0.00   22.56    1.37   96%  96% Init mutex
    1.93    0.00   61.71    3.74   96%  96% Lock [unlocked] mutex
    2.13    0.00   67.95    4.11   96%  96% Unlock [locked] mutex
    2.41    0.00   76.96    4.66   96%  96% Trylock [unlocked] mutex
    0.53    0.00   17.01    1.03   96%  96% Trylock [locked] mutex
    0.55    0.00   17.65    1.07   96%  96% Destroy mutex
    7.45    1.09  101.78    8.16   90%  90% Unlock/Lock mutex

    0.91    0.00   29.14    1.76   96%  96% Create mbox
    0.34    0.00   10.99    0.67   96%  96% Peek [empty] mbox
    2.14    0.00   68.35    4.14   96%  96% Put [first] mbox
    0.21    0.00    6.45    0.40   96%  96% Peek [1 msg] mbox
    0.95    0.00   30.26    1.83   96%  96% Put [second] mbox
    0.19    0.00    6.24    0.38   96%  96% Peek [2 msgs] mbox
    2.72    0.00   86.83    5.26   96%  96% Get [first] mbox
    0.23    0.00    7.50    0.45   96%  96% Get [second] mbox
    2.79    0.00   88.21    5.34   96%  96% Tryput [first] mbox
    1.50    0.00   47.94    2.90   96%  96% Peek item [non-empty] mbox
    2.39    0.00   76.43    4.63   96%  96% Tryget [non-empty] mbox
    0.23    0.00    7.25    0.44   96%  96% Peek item [empty] mbox
    0.36    0.00   11.14    0.67   96%  96% Tryget [empty] mbox
    0.46    0.00   14.77    0.89   96%  96% Waiting to get mbox
    0.65    0.00   20.66    1.25   96%  96% Waiting to put mbox
    0.78    0.00   24.88    1.51   96%  96% Delete mbox
    6.27    0.74   47.47    5.41   81%  78% Put/Get mbox

    0.29    0.00    9.34    0.57   96%  96% Init semaphore
    0.46    0.00   14.70    0.89   96%  96% Post [0] semaphore
    0.40    0.00    7.26    0.75   93%  93% Wait [1] semaphore
    1.20    0.00   38.26    2.32   96%  96% Trywait [0] semaphore
    0.19    0.00    6.19    0.37   96%  96% Trywait [1] semaphore
    0.78    0.00   24.96    1.51   96%  96% Peek semaphore
    0.65    0.00   20.86    1.26   96%  96% Destroy semaphore
    3.38    0.67   30.11    2.70   81%  75% Post/Wait semaphore

    1.01    0.00   32.35    1.96   96%  96% Create counter
    0.97    0.00   30.58    1.85   96%  96% Get counter value
    0.51    0.00   16.42    0.99   96%  96% Set counter value
    0.51    0.00   16.30    0.99   96%  96% Tick counter
    0.53    0.00   17.06    1.03   96%  96% Delete counter

    0.44    0.00   14.00    0.85   96%  96% Init flag
    1.41    0.00   44.91    2.72   96%  96% Destroy flag
    1.09    0.00   34.85    2.11   96%  96% Mask bits in flag
    1.49    0.00   47.54    2.88   96%  96% Set bits in flag [no waiters]
    2.56    0.00   81.68    4.95   96%  96% Wait for flag [AND]
    0.54    0.00    9.68    1.02   93%  93% Wait for flag [OR]
    0.74    0.00   23.62    1.43   96%  96% Wait for flag [AND/CLR]
    0.83    0.00   26.51    1.61   96%  96% Wait for flag [OR/CLR]
    0.38    0.00   12.18    0.74   96%  96% Peek on flag

    0.90    0.00   28.90    1.75   96%  96% Create alarm
    1.25    0.00   39.70    2.40   96%  96% Initialize alarm
    0.45    0.00   14.53    0.88   96%  96% Disable alarm
    2.17    0.00   69.17    4.19   96%  96% Enable alarm
    0.32    0.00   10.22    0.62   96%  96% Delete alarm
    0.26    0.00    8.46    0.51   96%  96% Tick counter [1 alarm]
    1.12    0.18   16.27    1.74   93%  93% Tick counter [many alarms]
    0.66    0.00   20.88    1.26   96%  96% Tick & fire counter [1 alarm]
    4.68    2.80   26.10    3.26   90%  90% Tick & fire counters [>1 together]
    0.51    0.27    7.26    0.42   96%  96% Tick & fire counters [>1 separately]
  259.37  101.76  523.44   60.66   58%  14% Alarm latency [0 threads]
  128.64   68.58  359.12   22.85   78%   2% Alarm latency [2 threads]
  124.96   74.43  290.21   23.04   74%  10% Alarm latency [many threads]
  251.84  111.49  415.10   61.60   53%  17% Alarm -> thread resume latency

  161.37   64.29  451.89    0.00            Clock/interrupt latency

   11.23    1.25  159.98    0.00            Clock DSR latency

     172     172     220                    Worker thread stack used (stack size 1088)
            All done, main thrd : stack used   884 size  1792
            All done :  Interrupt stack used   136 size  4096
            All done : Idlethread stack used   248 size  1280

Timing complete - 31030 ms total

PASS:<Basic timing OK>
EXIT:<done>

Other Issues

The platform HAL does not affect the implementation of other parts of the eCos HAL specification. The ARM architectural HAL documentation should be consulted for further details.