The HAL Port

The HAL Port
	Chapter 285. Raspberry Pi Board Support

Name

HAL Port — Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the Raspberry Pi hardware, and should be read in conjunction with that specification. The platform HAL package complements the ARM architectural HAL, the Cortex-A variant HAL and the BCM283X variant HAL. It provides functionality which is specific to the target board.

Startup

Following a hard or soft reset, the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

SDRAM

This is located at address 0x00000000 of the physical memory space. The HAL configures the MMU to retain the SDRAM at virtual address 0x00000000 with caching enabled. The same memory is also accessible uncached and unbuffered at virtual location 0x80000000 for use by device drivers. ROM applications are loaded by the GPU starting at 0x000008000. Memory is required for the MMU tables, and must be aligned on a 16Kbyte boundary. These therefore occupy memory from 0x00004000 to 0x00008000, just below the load address. Interrupt and exception vectors are placed at 0x00000000 and the virtual vectors occupy 256 bytes at 0x00000050. For ROM startup, all remaining SDRAM above 0x00008000 is available. JTAG startup applications are loaded from 0x00100000, leaving the bottom 1MiB unused. RAM and SMP startup applications are loaded from location 0x00200000, reserving 2MiB.

Boards with 256MiB or 512MiB of SDRAM will only occupy the least significant portion of this region. Accesses beyond the limit of physical memory will raise an exception. On boards with 1GiB, the peripheral registers overlay the top 16MiB of SDRAM, so not all the SDRAM is available. In all boards, the GPU must reserve a portion of SDRAM. Since eCos does not currently make use of the GPU, the minimum possible 16MiB is reserved. So, the smaller boards have a maximum of 240MiB and 496MiB RAM available, and the 1GiB boards have a maximum of 992MiB available. The GPU reserved region depends on the contents of config.txt at boot time, so these figures should not be relied upon. Applications should rely on eCos to manage the quantity of RAM available, or can use the macro HAL_MEM_REAL_REGION_TOP(0) to discover the actual size of the SDRAM available.

Peripheral Registers

These occupy a 16MiB physical address space at either 0x20000000 for the BCM2835 based systems or at 0x3F000000 for BCM2836 and BCM2837 based systems. The MMU is used to unify these disparate mappings by relocating both, uncached, to 0x50000000.

Multicore Peripheral Registers

These are only present in the BCM2836 and BCM2837 based systems and contain hardware that is only applicable to these multicore devices. This 1MiB area is identity mapped uncached at 0x40000000.

The virtual address space visible to applications is summarized in the following table. Any address range not mentioned here should not be accessed and will raise an exception if it is.

Base	Size (MiB)	Cache	Description
0x00000000	1008	Enabled	Normal SDRAM access -- to limit of physical RAM, raises an exception beyond that.
0x40000000	1	Disabled	Multicore registers -- multicore systems only, raises an exception in single core systems.
0x50000000	16	Disabled	Peripheral registers.
0x80000000	1008	Disabled	Uncached SDRAM access -- to limit of physical RAM, raises an exception beyond that.

Real-time Characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM32 mode and run in non-SMP mode on a Raspberry Pi3. The BCM283X is a high performance processor, but its general purpose timer is only clocked at 1Mhz. This results in microsecond level resolution which is insufficient precision for the timing of many eCos kernel operations.

Example 285.1. Raspberry Pi3 Real-time characterization

             Startup, main thrd : stack used   388 size  1792
             Startup :  Interrupt stack used  4096 size  4096
             Startup : Idlethread stack used    96 size  1280

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 0 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took    3.00 microseconds (3 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                  64
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                32
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32
   Stack Size:             1088


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
INFO:<Ctrl-C disabled until test completion>
    1.25    1.00    2.00    0.38   75%  75% Create thread
    0.44    0.00    1.00    0.49   56%  56% Yield thread [all suspended]
    0.53    0.00    1.00    0.50   53%  46% Suspend [suspended] thread
    0.47    0.00    1.00    0.50   53%  53% Resume thread
    0.52    0.00    1.00    0.50   51%  48% Set priority
    0.33    0.00    1.00    0.44   67%  67% Get priority
    0.69    0.00    1.00    0.43   68%  31% Kill [suspended] thread
    0.47    0.00    1.00    0.50   53%  53% Yield [no other] thread
    0.55    0.00    1.00    0.50   54%  45% Resume [suspended low prio] thread
    0.48    0.00    1.00    0.50   51%  51% Resume [runnable low prio] thread
    0.53    0.00    1.00    0.50   53%  46% Suspend [runnable] thread
    0.44    0.00    1.00    0.49   56%  56% Yield [only low prio] thread
    0.45    0.00    1.00    0.50   54%  54% Suspend [runnable->not runnable]
    0.69    0.00    1.00    0.43   68%  31% Kill [runnable] thread
    0.63    0.00    1.00    0.47   62%  37% Destroy [dead] thread
    0.94    0.00    1.00    0.12   93%   6% Destroy [runnable] thread
    1.47    1.00    2.00    0.50   53%  53% Resume [high priority] thread
    0.67    0.00    1.00    0.44   67%  32% Thread switch

    0.34    0.00    1.00    0.45   65%  65% Scheduler lock
    0.41    0.00    1.00    0.48   59%  59% Scheduler unlock [0 threads]
    0.43    0.00    1.00    0.49   57%  57% Scheduler unlock [1 suspended]
    0.38    0.00    1.00    0.47   61%  61% Scheduler unlock [many suspended]
    0.45    0.00    1.00    0.49   55%  55% Scheduler unlock [many low prio]

    0.34    0.00    1.00    0.45   65%  65% Init mutex
    0.47    0.00    1.00    0.50   53%  53% Lock [unlocked] mutex
    0.47    0.00    1.00    0.50   53%  53% Unlock [locked] mutex
    0.47    0.00    1.00    0.50   53%  53% Trylock [unlocked] mutex
    0.41    0.00    1.00    0.48   59%  59% Trylock [locked] mutex
    0.34    0.00    1.00    0.45   65%  65% Destroy mutex
    1.00    1.00    1.00    0.00  100% 100% Unlock/Lock mutex

    0.38    0.00    1.00    0.47   62%  62% Create mbox
    0.47    0.00    1.00    0.50   53%  53% Peek [empty] mbox
    0.47    0.00    1.00    0.50   53%  53% Put [first] mbox
    0.34    0.00    1.00    0.45   65%  65% Peek [1 msg] mbox
    0.50    0.00    1.00    0.50  100%  50% Put [second] mbox
    0.34    0.00    1.00    0.45   65%  65% Peek [2 msgs] mbox
    0.44    0.00    1.00    0.49   56%  56% Get [first] mbox
    0.50    0.00    1.00    0.50  100%  50% Get [second] mbox
    0.44    0.00    1.00    0.49   56%  56% Tryput [first] mbox
    0.50    0.00    1.00    0.50  100%  50% Peek item [non-empty] mbox
    0.44    0.00    1.00    0.49   56%  56% Tryget [non-empty] mbox
    0.50    0.00    1.00    0.50  100%  50% Peek item [empty] mbox
    0.41    0.00    1.00    0.48   59%  59% Tryget [empty] mbox
    0.34    0.00    1.00    0.45   65%  65% Waiting to get mbox
    0.34    0.00    1.00    0.45   65%  65% Waiting to put mbox
    0.38    0.00    1.00    0.47   62%  62% Delete mbox
    1.00    1.00    1.00    0.00  100% 100% Put/Get mbox

    0.34    0.00    1.00    0.45   65%  65% Init semaphore
    0.53    0.00    1.00    0.50   53%  46% Post [0] semaphore
    0.50    0.00    1.00    0.50  100%  50% Wait [1] semaphore
    0.53    0.00    1.00    0.50   53%  46% Trywait [0] semaphore
    0.44    0.00    1.00    0.49   56%  56% Trywait [1] semaphore
    0.34    0.00    1.00    0.45   65%  65% Peek semaphore
    0.34    0.00    1.00    0.45   65%  65% Destroy semaphore
    0.91    0.00    1.00    0.17   90%   9% Post/Wait semaphore

    0.38    0.00    1.00    0.47   62%  62% Create counter
    0.34    0.00    1.00    0.45   65%  65% Get counter value
    0.34    0.00    1.00    0.45   65%  65% Set counter value
    0.50    0.00    1.00    0.50  100%  50% Tick counter
    0.34    0.00    1.00    0.45   65%  65% Delete counter

    0.34    0.00    1.00    0.45   65%  65% Init flag
    0.47    0.00    1.00    0.50   53%  53% Destroy flag
    0.41    0.00    1.00    0.48   59%  59% Mask bits in flag
    0.44    0.00    1.00    0.49   56%  56% Set bits in flag [no waiters]
    0.50    0.00    1.00    0.50  100%  50% Wait for flag [AND]
    0.41    0.00    1.00    0.48   59%  59% Wait for flag [OR]
    0.53    0.00    1.00    0.50   53%  46% Wait for flag [AND/CLR]
    0.41    0.00    1.00    0.48   59%  59% Wait for flag [OR/CLR]
    0.34    0.00    1.00    0.45   65%  65% Peek on flag

    0.38    0.00    1.00    0.47   62%  62% Create alarm
    0.44    0.00    1.00    0.49   56%  56% Initialize alarm
    0.47    0.00    1.00    0.50   53%  53% Disable alarm
    0.50    0.00    1.00    0.50  100%  50% Enable alarm
    0.53    0.00    1.00    0.50   53%  46% Delete alarm
    0.50    0.00    1.00    0.50  100%  50% Tick counter [1 alarm]
    1.16    1.00    2.00    0.26   84%  84% Tick counter [many alarms]
    0.72    0.00    1.00    0.40   71%  28% Tick & fire counter [1 alarm]
    4.19    4.00    5.00    0.30   81%  81% Tick & fire counters [>1 together]
    1.50    1.00    2.00    0.50  100%  50% Tick & fire counters [>1 separately]
    2.80    2.00    3.00    0.31   80%  19% Alarm latency [0 threads]
    3.00    3.00    3.00    0.00  100% 100% Alarm latency [2 threads]
    3.00    3.00    3.00    0.00  100% 100% Alarm latency [many threads]
    3.00    3.00    3.00    0.00  100% 100% Alarm -> thread resume latency

    0.00    0.00    0.00    0.00            Clock/interrupt latency

    1.01    1.00    2.00    0.00            Clock DSR latency

     226     144     272                    Worker thread stack used (stack size 1088)
            All done, main thrd : stack used   820 size  1792
            All done :  Interrupt stack used   156 size  4096
            All done : Idlethread stack used   240 size  1280

Timing complete - 29830 ms total

PASS:<Basic timing OK>
EXIT:<done>

Other Issues

The platform HAL does not affect the implementation of other parts of the eCos HAL specification. The BCM283X processor HAL and the ARM architectural HAL documentation should be consulted for further details.


SMP Development and Debugging Support		RedBoot Extensions

2024-12-10

eCosPro Non-Commercial Public License