eCos Common Support for SPI Flash Memory Devices — Overview
provides an abstraction layer between the standard eCos I/O
Flash API package (
drivers. This allows for serial memory device support to be
shared across architectures and platforms, avoiding the need
for the H/W specific device drivers to duplicate manufacturer
or device specific information in each H/W
xSPI driver implementation.
Many eCos targets will still use the older driver model where the architecture specific device driver will implement direct support for a specific subset of SPI memory devices. Only newer ports, and some ports that have been explicitly updated, will reference this common approach. The goal is to bring as much support as is relevant for SPI memory devices into this single package, to aid maintenance and porting, with a simpler H/W device driver implementation for the platform specific component.
This common package presents as a Flash V2 device driver to the Flash I/O layer.
The package allows for
JEDEC Serial Flash Discoverable Parameters (SFDP)
device supplied parameter tables to be used to configure the
required device access. The package currently supports
JESD216D.01 and earlier devices. It will
work with devices that implement newer versions of the
standard, but will be limited to the backwards compatible
At the time of writing not all of the SFDP table declared configurations have been tested.
The following table is not an exhaustive list of tested platforms/devices, but an example set:
The common SPI memory driver package will be loaded
automatically when configuring eCos for a target with suitable
hardware. However the driver will be inactive unless the
generic flash package
loaded. It may be necessary to add the generic
CYGPKG_IO_FLASH package to the
configuration explicitly before the driver functionality
becomes available. There should never be any requirement to
load or unload the
The flash driver provides a small number of configuration options which application developers may use to control features provided by the package.
If this option is enabled then the flash device is configured for memory mapped mode when the underlying H/W driver and platform HAL support such use.
Memory mapped access allows the CPU to directly read data or execute code from the flash area. The default is for the feature to be enabled, which is desired for most configurations. However, in some situations, indirect (e.g. DMA) access may be preferred for performance reasons, in which case this feature can be disabled.
When the option is enabled some further configuration options are presented:
This option should be enabled if ISRs or DSRs are to execute from the memory mapped xSPI space.
This will adversely affect the interrupt latency of the system, since certain xSPI operations will need to disable interrupts when switching out of memory mapped mode (e.g. erasing). So this feature should only be enabled if actually required.
- If the eCos application providing the xSPI flash driver is executing from the flash device (using memory mapped mode) then some critical functionality must execute from a different memory space (e.g. SRAM).
- This option controls whether support for device soft reset is enabled. The developer is not normally required to modify this option
|2022-09-14||Open Publication License|