Setup — Preparing the SAMA5D3x-MB Board for eCos Development


In a typical development environment the SAMA5D3x-MB board is programmed via a JTAG/SWD interface. This will either be by loading smaller applications into the on-chip SRAM, or into suitably initialised DDR2-SDRAM memory. Alternatively applications may be loaded into bootable memory-mapped devices, e.g. EBI_CS0 NOR flash, or loaded via the on-chip RomBOOT code via a second-level SRAM boot scheme. The following sections initially deal with JTAG/SWD hardware based debugging approaches.

For debugging applications are loaded and then executed on the board via the debugger arm-eabi-gdb, or via the Eclipse IDE.

The SAMA5D3x-MB motherboard provides a built-in J-Link hardware debug solution, as well as optionally providing the J9 JTAG connector for attaching 3rd-party hardware debuggers (e.g. Ronetix PEEDI).


For the Ronetix PEEDI, the sama5d31ek.peedi.cfg file should be used to setup and configure the hardware to an appropriate state to load programs. This includes setting up the PLLs and SDRAM controller. You can also check the Ronetix website for updated versions.


Use of a PEEDI debugger requires hardware modification of the standard SAMA5D3x-MB board, which will provide a 20-pin ARM JTAG connector at J9. The required modifications are detailed in the board's user manual.

The sama5d31ek.peedi.cfg file also contains an option to define whether hardware or software breakpoints are used by default, using the CORE0_BREAKMODE directive in the [PLATFORM_CortexA8] section (NOTE: The PEEDI firmware identifies not just A8 CPUs with the CortexA8 tag). Edit this file if you wish to use hardware break points, and remember to restart the PEEDI to make the changes take effect.

On the PEEDI, debugging can be performed either via the telnet interface or using arm-eabi-gdb and the GDB interface. In the case of the latter, arm-eabi-gdb needs to connect to TCP port 2000 on the PEEDI's IP address. For example:

(gdb) target remote 111.222.333.444:2000

By default when the PEEDI is powered up, the target will always run the initialization section of the sama5d31ek.peedi.cfg file, and halts the target. This behaviour is repeated with the PEEDI reset command.

If the board is reset (either with the 'reset', or by pressing the reset button) and the 'go' command is then given, then the board will boot as normal. Depending on how the platform jumper state is configured this could run either a second-level bootstrap, or a ROM RedBoot resident in flash.

By default the arm-eabi-gdb connection to the PEEDI will default to displaying the obsolete FPA registers. To enable access to the VFP registers a suitable target description file should be configured prior to connecting to the target system. This can either be done manually every time a GDB session is started, or more sensibly embedded in the users .gdbinit used to configure GDB.

The sama5d3x-tdesc.xml file can be used to define the target description using the GDB set tdesc filename <file> command. For example the .gdbinit could contain something similar to:

set tdesc filename $ECOS_REPOSITORY/packages/hal/arm/cortexa/sama5d3/sama5d3x_mb/current/misc/sama5d3x-tdesc.xml

So that it has the relevent target description available prior to the remote debug connection being established. This will allow access to the VFP registers via the PEEDI, for example via the GDB info all-reg command.

Consult the PEEDI documentation for information on other features.