| Bootstrap | ||
|---|---|---|
 | Chapter 277. Atmel ATSAMA5D3 Variant HAL |  |
Name
Bootstrap — System startup
Overview
The BMS signal to the CPU controls the initial system bootstrap selection. This is used in conjunction with the OTP (FUSE) on-chip configuration, and reset “input” pin state, to select the boot source for the CPU.
Table 277.1. BMS signal
| BMS signal | Description |
|---|---|
| BMS_BIT=0 |
The embedded (on-chip) RomBOOT first-level
bootloader is used. The actual boot source used will depend on the
presence of suitable binaries on the sources scanned by the
RomBOOT code. The first acceptable binary is loaded
into SRAM and executed. If no valid non-volatile-memory (NVM) binary
is found then the RomBOOT will enter the Atmel
SAM-BA monitor.
|
| BMS_BIT=1 |
The application installed on the EBI_CS0 device is executed
in-situ. The on-chip RomBOOT configures the
chip-select for 12MHz RC access prior to executing the code mapped
from address 0x00000000.
|
The “Standard Boot Strategies” section of the SAMA5D3 Series Datasheet provides details about the boot sequence configuration, and should be read in conjunction with this documentation.
The hardware platform documentation should be read in conjunction with this generic SAMA5D3 CPU documentation with regards to specific jumper settings that may affect the bootstrap code executed.
For some designs directly booting from an EBI_CS0
memory-mapped device is the simplest option. However, making use of
the SAMA5D3 RomBOOT world to load a small
second-level boot loader allows the easier possibility of providing
support for in-field upgrades and selection of multiple application
images.
![[Note]](pix/note.png) | Note |
|---|---|
When |
| |  | |
| Hardware definitions |  | On-chip Subsystems and Peripherals |
| 2024-03-18 | eCosPro Non-Commercial Public License |