Exports

The variant HAL provides header files cyg/hal/var_arch.h, cyg/hal/var_intr.h and cyg/hal/var_cache.h. These header files export the functionality of this HAL to the architecture HAL, and are included automatically by the architecture HAL where needed.

Additionally, the variant HAL provides the cyg/hal/variant.inc header, which is included into the architecture assembly code and redefines some macros used there, to configure the architecture to the MIPS32 variant.

Startup

The MIPS32 HAL does no additional initialization beyond the redefined assembly macros mentioned above. As a purely CPU-based variant there are no additional variant-specific devices to be initialized.

Interrupts and Exceptions

The MIPS32 HAL defines some additional exception vectors that are present in MIPS32 variants. Otherwise it takes no part in interrupt or exception delivery.

Bit Indexing

The MIPS32 HAL provides replacement implementations of the HAL_LSBIT_INDEX and HAL_MSBIT_INDEX macros that use inline assembly CLZ instructions.

Cache Handling

The main contribution that the MIPS32 HAL makes is in cache handling. It provides cache handling macros that extend and modify those supplied in the architecture HAL. It also implements cache enable and disable support via the K0 field of the Config0 register. It also provides default cache dimension declarations, as well as a mechanism for these to be defined by the platform HAL.

Linker Scripts

The MIPS32 HAL provides the main linker script for use by all platforms. The MIPS32 HAL will generate the linker script for eCos applications. This involves the file src/mips_mips32.ld and a .ldi memory layout file, typically provided by the platform HAL. It is the .ldi file which places code and data in the appropriate places for the startup type, but most of the hard work is done via macros in the mips_mips32.ld file.