HAL Port — Implementation Details
This documentation explains how the eCos HAL specification has been mapped onto the STB200 hardware, and should be read in conjunction with that specification. The STB200 platform HAL package complements the MIPS architectural HAL, the PNX8310 variant HAL, and the PNX83xx support HAL. It provides functionality which is specific to the target board.
Following a hard or soft reset the HAL will set up some of the on-chip
peripherals appropriately for eCos, but most peripherals are left to
their default settings. Full details of this initialization can be
found in the function
Linker Scripts and Memory Maps
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- External SDRAM
- This is mapped to location 0x80000000. The first four kilobytes are reserved for exception vectors and for some data which needs to be shared between RAM startup applications and the ROM monitor. For ROMRAM or JTAG startup, code will be loaded from 0x80001000 onwards. For RAM startup, code will start at 0x80040000, reserving the bottom 256K for RedBoot's code and data.
- Internal RAM
- The 4K of deeply-embedded internal RAM is mapped at location 0xA4000000. Neither eCos nor RedBoot use this so all of it is available to the application. The PNX8310 variant HAL documentation explains how to map code or data into this memory.
- On-chip Peripherals
- These are accessible at location 0xB7000000 onwards.
- External Flash
- This is located at location 0x98000000 onwards. Different STB200 boards may come with different flash chips so CFI is used at run-time to query the flash chip and adapt. Typically the first 128K of flash at location 0x98000000 is used to hold RedBoot, and the last flash block at location 0x983F0000 is used to hold flash management data and the RedBoot fconfig variables. The remaining blocks can be used by application code.
The platform HAL provides configuration options for the eCos system clock. This always uses the hardware timer TMR1, part of the PR1910 core and is accessed via coprocessor 0. The actual HAL macros for managing the clock are provided by the PNX8310 variant HAL. The specific numbers used are a characteristic of the platform because they depend on the processor speed. TMR2 is used by the gprof-based profiling code, or is available for application use when profiling is not enabled. TMR3 is normally used only for the watchdog.
The STB200 platform HAL enables MIPS16 support in the architecture HAL. This allows application code to be compiled using MIPS16 options and linked against the 32 bit mode eCos library.
To compile for MIPS16 the standard flags that are used in eCos and
exported to the
ecos.mak file should be used
except that the
-mips2 flag should be replaced by
-mips16 -fwritable-strings. The
-mips16 option enables MIPS16 compilation and the
-fwritable-strings option is a work-around for a
bug in the compiler.
The STB200 platform HAL does not affect the implementation of other parts of the eCos HAL specification.
|2023-04-25||eCosPro Non-Commercial Public License|