— eCos Support for the MCF5282 On-chip Watchdog Device
The Freescale MCF5282 Coldfire processor has two built-in watchdog
devices. The System Control Module or SCM has a simple watchdog device
which can only generate an interrupt when the watchdog triggers. The
Watchdog Timer Module has a more advanced watchdog device, but
unfortunately it has a write-once register which makes it difficult to
use in a typical development environment. The package
CYGPKG_DEVS_WATCHDOG_MCF5282 provides an eCos
device driver for the SCM device, complementing the generic package
CYGPKG_IO_WATCHDOG. The functionality should be
accessed via the standard eCos watchdog functions
By default the watchdog driver installs a non-maskable interrupt with the highest possible priority, and a custom interrupt VSR will immediately perform a reset using the chip's Reset Controller Module. This is not quite as good as a watchdog device which performs the reset automatically: corruption of the interrupt vector table, the interrupt controller, the SCM module, or the VSR code may prevent a reset from occurring. However in most circumstances a watchdog timeout will still result in a full reset. Alternatively the driver can be configured to generate an ordinary interrupt, leaving it up to application code to perform recovery from the timeout.
The MCF5282 watchdog driver package should be loaded automatically
when selecting a platform containing an MCF5282 processor, and it
should never be necessary to load it explicitly into the
configuration. The package is inactive unless the generic watchdog
CYGPKG_IO_WATCHDOG is loaded. Depending on
the choice of eCos template it may be necessary to load the latter.
The first configuration option is
CYGIMP_WATCHDOG_HARDWARE, which can be used to
disable the use of the hardware watchdog and switch to a software
emulation provided by the generic watchdog package instead. This may
prove useful during debugging.
If the hardware watchdog is enabled then
whether the driver will install a non-maskable interrupt VSR which
performs a reset, or an ordinary interrupt handler which calls into
application code. The default is to attempt the reset.
The watchdog timeout is controlled by
CYGNUM_DEVS_WATCHDOG_MCF5282_TICKS. It is measured
in system clock ticks and only a limited number of values are
223, 227 and
231. The default is
227 clock ticks. For a processor running at
64MHz that corresponds to just over two seconds. With the same clock
223 ticks would give 0.13 seconds and
231 would give 33 seconds.
If the watchdog is configured to generate an ordinary interrupt rather
than attempt a reset then
determines the interrupt priority. The default will be provided by the
processor HAL. On an MCF5282 all interrupt priorities must be unique.
The watchdog device driver does not require any platform-specific
support. The only porting effort required is to list
CYGPKG_DEVS_WATCHDOG_MCF5282 as one of the hardware
packages in the ecos.db target entry.
|2022-09-14||Open Publication License|