Name
HAL Port — Implementation Details
Overview
This documentation explains how the eCos HAL specification has been mapped onto the Freescale TWR-K70F120M hardware, and should be read in conjunction with that specification. The Freescale TWR-K70F120M platform HAL package complements the Cortex-M architectural HAL and the Kinetis variant HAL. It provides functionality which is specific to the target board.
Startup
Following a hard or soft reset the HAL will initialize or reinitialize many of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services, and for the platform JTAG startup where the host debugger configuration is responsible for initialising the DDRMC world for the external SDRAM used to hold the application being loaded.
For ROM startup, the HAL will perform additional initialization,
programming the various internal registers including the PLL,
peripheral clocks and GPIO pins. The details of the early hardware
startup may be found in
the src/twr_k70f120m_misc.c
in
both hal_system_init
and
hal_platform_init
.
Memory Map
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- Internal RAM
-
This is located at address 0x1FFF0000 of the memory space, and is
128KiB in size. The eCos VSR table occupies the bottom 512-bytes. The
virtual vector table starts at 0x1FFF0200 and extends to
0x20000300. For ROM, and JTAG startups, the
top
CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
bytes are reserved for the interrupt stack. The remainder of internal RAM is available for use by applications. - Internal FLASH
- This is located at address 0x00000000 of the memory space. This region is 1MiB in size. ROM applications are by default configured to run from this memory.
- On-Chip Peripherals
- These are accessible from locations 0x40000000 and 0xE0000000 upwards. Descriptions of the contents can be found in the Kinetis User Manual.
Linker Scripts
The platform linker scripts define the following symbols:
- hal_vsr_table
- This defines the location of the VSR table. This is set to 0x1FFF0000 for all startup types, and space for 128 entries allocated, though the K70 sub-family only use 121 entries.
- hal_virtual_vector_table
- This defines the location of the virtual vector table used to communicate between an ROM monitor and an eCos application. This is allocated right after the VSR table, at 0x20000200.
- hal_interrupt_stack
- This defines the location of the interrupt stack. For all startup types this is allocated to the top of internal SRAM, 0x20010000.
- hal_startup_stack
- This defines the location of the startup stack. For all startup types it is initially allocated at the half-way point of the interrupt stack.
Diagnostic LEDs
Four LEDs are fitted on the board for diagnostic purposes:
Platform HAL manifest | Colour | Board Label |
---|---|---|
CYGHWR_IO_TWRK70F120M_PIN_LED1
| Orange |
E1
|
CYGHWR_IO_TWRK70F120M_PIN_LED2
| Yellow |
E2
|
CYGHWR_IO_TWRK70F120M_PIN_LED3
| Green |
E3
|
CYGHWR_IO_TWRK70F120M_PIN_LED4
| Blue |
E4
|
The platform HAL header file at
<cyg/hal/plf_io.h>
defines
the following convenience function to allow the LEDs to be set:
extern void hal_twr_k70f120m_led(char c);
The lowest 4-bits of the argument c
correspond to
each of the 4 LEDs (with LED1 as the least significant bit).
The platform HAL will automatically light all of the LEDs when the platform initialisation is complete, however the LEDs are free for application use.
Real-time Characterization
The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built for the variant ROM startup with optimization flag -O2.
Example 288.1. twr_k70f120m Real-time characterization
INFO:<code from 0x00000410 -> 0x00009d6c, CRC 3328> Startup, main thrd : stack used 240 size 2336 Startup : Idlethread stack used 216 size 1440 eCos Kernel Timings Notes: all times are in microseconds (.000001) unless otherwise stated Reading the hardware clock takes 0 'ticks' overhead ... this value will be factored out of all other measurements Clock interrupt took 4.00 microseconds (4 raw clock ticks) Testing parameters: Clock samples: 32 Threads: 3 Thread switches: 128 Mutexes: 32 Mailboxes: 32 Semaphores: 32 Scheduler operations: 128 Counters: 32 Flags: 32 Alarms: 32 Stack Size: 1888 Confidence Ave Min Max Var Ave Min Function ====== ====== ====== ====== ========== ======== 6.67 6.00 8.00 0.89 66% 66% Create thread 1.00 1.00 1.00 0.00 100% 100% Yield thread [all suspended] 1.00 1.00 1.00 0.00 100% 100% Suspend [suspended] thread 1.00 1.00 1.00 0.00 100% 100% Resume thread 1.67 1.00 2.00 0.44 66% 33% Set priority 0.00 0.00 0.00 0.00 100% 100% Get priority 3.33 3.00 4.00 0.44 66% 66% Kill [suspended] thread 1.00 1.00 1.00 0.00 100% 100% Yield [no other] thread 2.00 2.00 2.00 0.00 100% 100% Resume [suspended low prio] thread 1.33 1.00 2.00 0.44 66% 66% Resume [runnable low prio] thread 1.33 1.00 2.00 0.44 66% 66% Suspend [runnable] thread 1.00 1.00 1.00 0.00 100% 100% Yield [only low prio] thread 1.00 1.00 1.00 0.00 100% 100% Suspend [runnable->not runnable] 3.33 3.00 4.00 0.44 66% 66% Kill [runnable] thread 2.67 2.00 3.00 0.44 66% 33% Destroy [dead] thread 4.67 4.00 5.00 0.44 66% 33% Destroy [runnable] thread 6.67 6.00 7.00 0.44 66% 33% Resume [high priority] thread 2.13 2.00 3.00 0.23 86% 86% Thread switch 0.24 0.00 1.00 0.37 75% 75% Scheduler lock 0.81 0.00 1.00 0.31 81% 18% Scheduler unlock [0 threads] 0.88 0.00 1.00 0.22 87% 12% Scheduler unlock [1 suspended] 0.82 0.00 1.00 0.30 82% 17% Scheduler unlock [many suspended] 0.88 0.00 1.00 0.22 87% 12% Scheduler unlock [many low prio] 0.28 0.00 1.00 0.40 71% 71% Init mutex 1.22 1.00 2.00 0.34 78% 78% Lock [unlocked] mutex 1.34 1.00 2.00 0.45 65% 65% Unlock [locked] mutex 1.09 1.00 2.00 0.17 90% 90% Trylock [unlocked] mutex 0.97 0.00 1.00 0.06 96% 3% Trylock [locked] mutex 0.31 0.00 1.00 0.43 68% 68% Destroy mutex 5.94 5.00 7.00 0.18 87% 9% Unlock/Lock mutex 0.38 0.00 1.00 0.47 62% 62% Create mbox 0.25 0.00 1.00 0.38 75% 75% Peek [empty] mbox 1.25 1.00 2.00 0.38 75% 75% Put [first] mbox 0.22 0.00 1.00 0.34 78% 78% Peek [1 msg] mbox 1.19 1.00 2.00 0.30 81% 81% Put [second] mbox 0.28 0.00 1.00 0.40 71% 71% Peek [2 msgs] mbox 1.28 1.00 2.00 0.40 71% 71% Get [first] mbox 1.25 1.00 2.00 0.38 75% 75% Get [second] mbox 1.13 1.00 2.00 0.22 87% 87% Tryput [first] mbox 1.09 1.00 2.00 0.17 90% 90% Peek item [non-empty] mbox 1.13 1.00 2.00 0.22 87% 87% Tryget [non-empty] mbox 1.03 1.00 2.00 0.06 96% 96% Peek item [empty] mbox 1.25 1.00 2.00 0.38 75% 75% Tryget [empty] mbox 0.22 0.00 1.00 0.34 78% 78% Waiting to get mbox 0.25 0.00 1.00 0.38 75% 75% Waiting to put mbox 0.47 0.00 1.00 0.50 53% 53% Delete mbox 4.13 4.00 5.00 0.22 87% 87% Put/Get mbox 0.22 0.00 1.00 0.34 78% 78% Init semaphore 1.00 1.00 1.00 0.00 100% 100% Post [0] semaphore 1.09 1.00 2.00 0.17 90% 90% Wait [1] semaphore 0.88 0.00 1.00 0.22 87% 12% Trywait [0] semaphore 1.00 1.00 1.00 0.00 100% 100% Trywait [1] semaphore 0.44 0.00 1.00 0.49 56% 56% Peek semaphore 0.25 0.00 1.00 0.38 75% 75% Destroy semaphore 3.69 3.00 5.00 0.47 62% 34% Post/Wait semaphore 0.75 0.00 1.00 0.38 75% 25% Create counter 0.38 0.00 1.00 0.47 62% 62% Get counter value 0.25 0.00 1.00 0.38 75% 75% Set counter value 1.25 1.00 2.00 0.38 75% 75% Tick counter 0.25 0.00 1.00 0.38 75% 75% Delete counter 0.28 0.00 1.00 0.40 71% 71% Init flag 1.06 1.00 2.00 0.12 93% 93% Destroy flag 0.97 0.00 2.00 0.12 90% 6% Mask bits in flag 1.13 1.00 2.00 0.22 87% 87% Set bits in flag [no waiters] 1.78 1.00 2.00 0.34 78% 21% Wait for flag [AND] 1.50 1.00 2.00 0.50 100% 50% Wait for flag [OR] 1.56 1.00 2.00 0.49 56% 43% Wait for flag [AND/CLR] 1.59 1.00 2.00 0.48 59% 40% Wait for flag [OR/CLR] 0.25 0.00 1.00 0.38 75% 75% Peek on flag 0.81 0.00 1.00 0.31 81% 18% Create alarm 1.78 1.00 2.00 0.34 78% 21% Initialize alarm 0.94 0.00 1.00 0.12 93% 6% Disable alarm 1.63 1.00 2.00 0.47 62% 37% Enable alarm 1.13 1.00 2.00 0.22 87% 87% Delete alarm 1.38 1.00 2.00 0.47 62% 62% Tick counter [1 alarm] 6.63 6.00 7.00 0.47 62% 37% Tick counter [many alarms] 2.22 2.00 3.00 0.34 78% 78% Tick & fire counter [1 alarm] 36.91 36.00 37.00 0.17 90% 9% Tick & fire counters [>1 together] 7.72 7.00 8.00 0.40 71% 28% Tick & fire counters [>1 separately] 3.01 3.00 4.00 0.01 99% 99% Alarm latency [0 threads] 3.00 3.00 3.00 0.00 100% 100% Alarm latency [2 threads] 3.05 3.00 4.00 0.10 94% 94% Alarm latency [many threads] 6.02 6.00 8.00 0.05 98% 98% Alarm -> thread resume latency 344 344 344 Worker thread stack used (stack size 1888) All done, main thrd : stack used 792 size 2336 All done : Idlethread stack used 304 size 1440 Timing complete - 28960 ms total PASS:<Basic timing OK> EXIT:<done>
2024-03-18 | eCosPro Non-Commercial Public License |