Setup — Preparing the STM32F4DISCOVERY Board for eCos Development


Given the limited available RAM memory, it is expected that the most common development method is to use JTAG/SWD for development, either by loading smaller applications into RAM, or by programming larger applications directly into on-chip Flash. In the first case, eCos applications should be configured for the JTAG startup type, and in the second case for the ROM startup type.

Nevertheless, it is still possible to program a GDB stub ROM image into on-chip Flash and download and debug via a serial UART, if pins for the UART are available. In that case, eCos applications are configured for RAM startup and then downloaded and run on the board via the debugger arm-eabi-gdb, or via the Eclipse IDE. For serial communications, all versions run with 8 bits, no parity, and 1 stop bit at 115200 baud. This rate can be changed in the eCos configuration used for building the GDB stub ROM image.

HAL startup types

The following startup types may be selected for applications:

ROMPrograms running from internal FLASH
JTAGPrograms running from RAM, loaded via JTAG or SWD debug hardware
RAMPrograms loading via a GDB stub ROM and serial connection into RAM

Further details are available later in this manual.

Programming ROM images

To program ROM startup applications into Flash, including the GDB stub ROM, a JTAG/SWD debugger that understands the STM32 flash may be used, such as a Ronetix PEEDI.

However, since the STM32F4DISCOVERY board has a built-in ST-LINK/V2 SWD interface, if the CN3 jumpers are closed then the micro USB host connection and suitable host software (e.g. The OpenOCD package openocd tool) can be used to program the flash. Normally a default openocd session provides a comand-line via port 4444. Consult the OpenOCD documentation for more details if a non-default openocd configuration is being used.

With a telnet connection established to the openocd any binary data can easily be written to the on-chip flash. e.g.

$ telnet localhost 4444
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> flash write_image test.bin 0x08000000
wrote 32518 bytes from file test.bin in 1.073942s (29.569 KiB/s)

Programming ROM images with a Ronetix PEEDI

This section describes how to program ROM images using a Ronetix PEEDI debugger.

The PEEDI must be configured to allow communication with your local network, and configured with the parameters for interfacing with the target board. It must then be used to download and program the ROM image into the internal flash. The following steps give a typical outline for doing this. Consult the PEEDI documentation for alternative approaches, such as using FTP or HTTP instead of TFTP.

Preparing the Ronetix PEEDI JTAG debugger

  1. Prepare a PC to act as a host and start a TFTP server on it.
  2. Connect the PEEDI JTAG debugger via both serial and ethernet to the host PC and power it on. Use the serial cable supplied with the PEEDI (straight through, not null modem).
  3. Verify the PEEDI is using up-to-date firmware, of version 11.10.1 or later. Older PEEDI firmware does not support the STM32 F4 family correctly, particularly if wishing to use the PEEDI's own 'flash' commands to modify the on-chip Flash. If the firmware is not recent enough, follow the PEEDI User Manual's instructions which describe how to update the PEEDI firmware.
  4. Locate the PEEDI configuration file peedi.stm32f4dis.cfg within the eCos platform HAL package in the source repository. This will be in the directory packages/hal/cortexm/stm32/stm32f4dis/current/misc relative to the root of your eCos installation.
  5. Place the PEEDI configuration file in a location on the PC accessible to the TFTP server. Later you will configure the PEEDI to load this file via TFTP as its configuration file.
  6. Open peedi.stm32f4dis.cfg in an editor such as emacs or notepad and insert your own license information in the [LICENSE] section.
  7. Install and configure the PEEDI in line with the PEEDI Quick Start Guide or User's Manual, especially configuring PEEDI's RedBoot with the network information. Configure it to use the peedi.stm32f4dis.cfg target configuration file on the TFTP server at the appropriate point of the config process, for example with a path such as: tftp://
  8. Reset the PEEDI.
  9. Connect to the PEEDI's CLI interface via TCP/IP on the standard telnet port 23. The telnet application is suitable for this. You should see output similar to the following:

    $ telnet
    Connected to
    Escape character is '^]'.
    PEEDI - Powerful Embedded Ethernet Debug Interface
    Copyright (c) 2005-2011 - All rights reserved
    Hw:1.2, L:JTAG v1.6 Fw:12.6.1, SN: PD-XXXX-XXXX-XXXX

Preparing the STM32F4DISCOVERY board for programming with PEEDI

Follow the steps in this section in order to allow communication between the board and the host PC, and between the board and the JTAG device.

If programming a GDB stub ROM or an application which uses serial output, you should first:

  1. Connect an adaptor from the serial pins on the board to an RS232 DB9 serial connector or cable, then connect from there to a serial port on the host computer with a null modem DB9 RS232 serial cable.
  2. Start a suitable terminal emulator on the host computer such as minicom on Linux or PuTTY on Windows. Set the communication parameters to 115200 baud, 8 data bits, no parity bit and 1 stop bit with no flow control.

For all applications, you must:

  1. Connect the board to the PEEDI. Since the STM32F4DISCOVERY does not have a standard ARM Cortex-M connector a custom connection from the Target port on the PEEDI to the STM32F4DISCOVERY needs to be wired.


    This is a direct connection from the PEEDI without any PEEDI adapter installed. Also the STM32F4DISCOVERY CN3 jumpers should be removed to disconnect the ST-Link from driving the target STM32F4 SWD interface.

    The following table maps the PEEDI TARGET connector pin numbers to the STM32F4DISCOVERY P1 and P2 connector pins, and assumes a standard PEEDI PLATFORM = CortexM3_SWD configuration.

    Vdd1P1#3 (VDD)
    SWCLK3P2#39 (PA14)
    SWDIO7P2#42 (PA13)
    SWO11P2#28 (PB3)
    nRST20P1#6 (NRST)
    GND16P1#49 (GND)
  2. Power up the STMF4DISCOVERY board.

  3. Connect to the PEEDI's telnet CLI on port 23 as before.
  4. Confirm correct connection with the PEEDI with the reset reset command as follows:

    stm32f4discovery> reset reset
    ++ info: RESET and TRST asserted
    ++ info: TRST released
    ++ info: TAP : IDCODE = 0x2BA01477, Cortex M3 SWD
    ++ info: RESET released
    ++ info: core connected
    ++ info: core 0: initialized

Installation into Flash

The following describes the procedure for installing a ROM application into on-chip Flash, using the GDB stub ROM image as an example of such an application.

  1. Use arm-eabi-objcopy to convert the linked application, in ELF format, into binary format. For example:

    $ arm-eabi-objcopy -O binary programname programname.bin

    In the case of the GDB stub ROM image, a prebuilt image is available with the name gdb_module.bin within the loaders subdirectory of the base of the eCos installation.

  2. Copy the binary file (.bin file) into a location on the host computer accessible to its TFTP server.

  3. Connect to the PEEDI's telnet interface, and program the image into Flash with the following command, replacing TFTP_SERVER with the address of the TFTP server and /BINPATH with the location of the .bin file relative to the TFTP server root directory. For example for the GDB stub ROM:

    stm32f4discovery> flash program tftp://TFTP_SERVER/BINPATH/gdb_module.bin bin 0x08000000 erase
    ++ info: Programming image file: tftp://TFTP_SERVER/BINPATH/gdb_module.bin
    ++ info: Programming using agent, buffer = 4096 bytes
    ++ info: At absolute address:    0x08000000
    erasing     at 0x08000000 (sector #0)
    programming at 0x08000000
    programming at 0x08001000
    programming at 0x08002000
    programming at 0x08003000
    erasing     at 0x08004000 (sector #1)
    programming at 0x08004000
    ++ info: successfully programmed 20.00 KB in 1.11 sec

The installation into Flash is now complete. For applications which print output on startup to the USART3 RS232 serial port, such as the GDB stub ROM application, this can easily by tested by powering off the board, disconnecting the JTAG, and then powering on the board again. In the case of the GDB stub ROM image, output similar to the following should be visible (although specific numbers may differ):


Rebuilding the GDB stub

Should it prove necessary to rebuild the GDB stub ROM binary, this is done most conveniently at the command line. The steps needed are:

$ mkdir gdbstub_stm32f4dis
$ cd gdbstub_stm32f4dis
$ ecosconfig new stm32f4dis stubs
[ … ecosconfig output elided … ]
$ ecosconfig tree
$ make

At the end of the build, the install/bin subdirectory should contain the file gdb_module.bin. This may be programmed to the board using the above procedure.