| The HAL Port | ||
|---|---|---|
 | Chapter 300. STM32F429I-DISCO Platform HAL |  |
Name
HAL Port — Implementation Details
Overview
This documentation explains how the eCos HAL specification has been mapped onto the STM32F429I-DISCO board hardware, and should be read in conjunction with that specification. The STM32F429I-DISCO platform HAL package complements the Cortex-M architectural HAL and the STM32 variant HAL. It provides functionality which is specific to the target board.
Startup
Following a hard or soft reset the HAL will initialize or reinitialize
many of the on-chip peripherals. There is an exception
for RAM startup applications which depend on a ROM
monitor for certain services.
For ROM, ROMINT, SRAM
and JTAG startup types the HAL will perform
additional initialization, programming the various internal registers
including the PLL, peripheral clocks and GPIO pins. The details of the
early hardware startup may be found in
the src/stm32f429i_disco_misc.c in
both hal_system_init
and hal_platform_init.
Memory Map
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- Internal RAM
This is located at address
0x20000000of the memory space, and is 192KiB in size. The eCos VSR table occupies the bottom 392 bytes of memory, with the virtual vector table starting at0x200001ACand extending to0x200002AC. ForROM,ROMINT,SRAMandJTAGstartups, the topCYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZEbytes are reserved for the interrupt stack. The remainder of internal RAM is available for use by applications.For all configurations there is also a block of (close-coupled) SRAM located at address
0x10000000of the memory space, and 64KiB in size.- External RAM
This is located at address
0x90000000of the memory space, and is 8MiB long. ForROMapplications, all of the SDRAM is available for use. ForJTAGapplications the application is loaded from0x90000000with the remaining SDRAM after the code+data available for application use.For
RAMstartup applications, SDRAM below0x90008000is reserved for RedBoot and the topCYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZEbytes are reserved for the interrupt stack, the remainder is available for the application.- Internal FLASH
-
This is located at address
0x08000000of the memory space and will be mapped to0x00000000at reset. This region is 2048KiB in size.ROMandROMINTapplications are by default configured to run from this memory. - On-Chip Peripherals
-
These are accessible at locations
0x40000000and0xE0000000upwards. Descriptions of the contents can be found in the STM32 User Manual.
Linker Scripts
The platform linker scripts define the following symbols:
- hal_vsr_table
-
This defines the location of the VSR table. This is set
to
0x20000000for all startup types, and space for 98 entries is reserved. - hal_virtual_vector_table
-
This defines the location of the virtual vector table used to
communicate between an ROM monitor and an eCos application. This is
allocated right after the VSR table, at
0x200001AC. - hal_interrupt_stack
-
This defines the location of the interrupt
stack. For
ROM,ROMINT,SRAMandJTAGstartups, this is allocated to the top of internal SRAM,0x20030000. ForRAMstartups, it is allocated to the top of external SDRAM,0x90800000. - hal_startup_stack
- This defines the location of the startup stack. For all startup types it is initially allocated at the half-way point of the interrupt stack.
Diagnostic LEDs
Two LEDs are fitted on the board for diagnostic purposes: LED0 (green), marked as LD3; and LED1 (red) marked as LD4.
The platform HAL header file
at <cyg/hal/plf_io.h>
defines the following convenience function to allow the LEDs to be
set:
extern void hal_stm32f429i_disco_led(char c);
The lowest 2-bits of the argument c correspond to
each of the 2 LEDs (with LED0 as the least significant bit).
The platform HAL will automatically light LED0 when the platform initialisation is complete, however the LEDs are free for application use.
Flash wait states
The STM32F429I-DISCO platform HAL provides a configuration option to
set the number of Flash read wait states to
use: CYGNUM_HAL_CORTEXM_STM32_FLASH_WAIT_STATES. It
is important to verify and if necessary update this value if changing
the CPU clock (HCLK) frequency or CPU voltage. Consult the STM32 Flash
programming manual (PM0081) for appropriate values for different clock
speeds or voltages. The default of 5 reflects a supply voltage of 3.3V
and HCLK of 168MHz.
Real-time characterization
The tm_basic kernel test gives statistics gathered
about the real-time characterization and performance of the
kernel. The sample output is shown here for information. The test was
built for SRAM startup with optimization flag
-O2, since it provides the best performance as both code and data
could remain on-chip.
Example 300.1. stm32f429i_disco Real-time characterization
eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated
Reading the hardware clock takes 0 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took 4.00 microseconds (4 raw clock ticks)
Testing parameters:
Clock samples: 32
Threads: 8
Thread switches: 128
Mutexes: 16
Mailboxes: 16
Semaphores: 16
Scheduler operations: 128
Counters: 16
Flags: 16
Alarms: 16
Stack Size: 1088
Confidence
Ave Min Max Var Ave Min Function
====== ====== ====== ====== ========== ========
4.63 4.00 5.00 0.47 62% 37% Create thread
1.00 1.00 1.00 0.00 100% 100% Yield thread [all suspended]
1.00 1.00 1.00 0.00 100% 100% Suspend [suspended] thread
1.00 1.00 1.00 0.00 100% 100% Resume thread
1.38 1.00 2.00 0.47 62% 62% Set priority
0.38 0.00 1.00 0.47 62% 62% Get priority
2.75 2.00 3.00 0.38 75% 25% Kill [suspended] thread
1.00 1.00 1.00 0.00 100% 100% Yield [no other] thread
1.38 1.00 2.00 0.47 62% 62% Resume [suspended low prio] thread
0.88 0.00 1.00 0.22 87% 12% Resume [runnable low prio] thread
1.13 1.00 2.00 0.22 87% 87% Suspend [runnable] thread
1.00 1.00 1.00 0.00 100% 100% Yield [only low prio] thread
1.00 1.00 1.00 0.00 100% 100% Suspend [runnable->not runnable]
2.63 2.00 3.00 0.47 62% 37% Kill [runnable] thread
2.25 2.00 3.00 0.38 75% 75% Destroy [dead] thread
4.25 4.00 5.00 0.38 75% 75% Destroy [runnable] thread
4.75 4.00 5.00 0.38 75% 25% Resume [high priority] thread
1.61 1.00 3.00 0.49 59% 39% Thread switch
0.21 0.00 1.00 0.33 78% 78% Scheduler lock
0.78 0.00 1.00 0.34 78% 21% Scheduler unlock [0 threads]
0.79 0.00 1.00 0.33 78% 21% Scheduler unlock [1 suspended]
0.76 0.00 1.00 0.37 75% 24% Scheduler unlock [many suspended]
0.77 0.00 1.00 0.36 76% 23% Scheduler unlock [many low prio]
0.31 0.00 1.00 0.43 68% 68% Init mutex
1.13 1.00 2.00 0.22 87% 87% Lock [unlocked] mutex
1.13 1.00 2.00 0.22 87% 87% Unlock [locked] mutex
1.00 1.00 1.00 0.00 100% 100% Trylock [unlocked] mutex
0.94 0.00 1.00 0.12 93% 6% Trylock [locked] mutex
0.25 0.00 1.00 0.38 75% 75% Destroy mutex
5.00 5.00 5.00 0.00 100% 100% Unlock/Lock mutex
0.44 0.00 1.00 0.49 56% 56% Create mbox
0.13 0.00 1.00 0.22 87% 87% Peek [empty] mbox
1.06 1.00 2.00 0.12 93% 93% Put [first] mbox
0.00 0.00 0.00 0.00 100% 100% Peek [1 msg] mbox
1.06 1.00 2.00 0.12 93% 93% Put [second] mbox
0.06 0.00 1.00 0.12 93% 93% Peek [2 msgs] mbox
1.25 1.00 2.00 0.38 75% 75% Get [first] mbox
1.00 1.00 1.00 0.00 100% 100% Get [second] mbox
1.00 1.00 1.00 0.00 100% 100% Tryput [first] mbox
0.88 0.00 1.00 0.22 87% 12% Peek item [non-empty] mbox
1.00 1.00 1.00 0.00 100% 100% Tryget [non-empty] mbox
0.94 0.00 1.00 0.12 93% 6% Peek item [empty] mbox
0.94 0.00 1.00 0.12 93% 6% Tryget [empty] mbox
0.19 0.00 1.00 0.30 81% 81% Waiting to get mbox
0.31 0.00 1.00 0.43 68% 68% Waiting to put mbox
0.38 0.00 1.00 0.47 62% 62% Delete mbox
3.00 3.00 3.00 0.00 100% 100% Put/Get mbox
0.19 0.00 1.00 0.30 81% 81% Init semaphore
0.94 0.00 1.00 0.12 93% 6% Post [0] semaphore
0.94 0.00 1.00 0.12 93% 6% Wait [1] semaphore
1.00 1.00 1.00 0.00 100% 100% Trywait [0] semaphore
0.88 0.00 1.00 0.22 87% 12% Trywait [1] semaphore
0.25 0.00 1.00 0.38 75% 75% Peek semaphore
0.25 0.00 1.00 0.38 75% 75% Destroy semaphore
3.00 3.00 3.00 0.00 100% 100% Post/Wait semaphore
0.44 0.00 1.00 0.49 56% 56% Create counter
0.50 0.00 1.00 0.50 100% 50% Get counter value
0.19 0.00 1.00 0.30 81% 81% Set counter value
1.13 1.00 2.00 0.22 87% 87% Tick counter
0.25 0.00 1.00 0.38 75% 75% Delete counter
0.25 0.00 1.00 0.38 75% 75% Init flag
1.00 1.00 1.00 0.00 100% 100% Destroy flag
1.00 1.00 1.00 0.00 100% 100% Mask bits in flag
1.00 1.00 1.00 0.00 100% 100% Set bits in flag [no waiters]
1.44 1.00 2.00 0.49 56% 56% Wait for flag [AND]
1.38 1.00 2.00 0.47 62% 62% Wait for flag [OR]
1.38 1.00 2.00 0.47 62% 62% Wait for flag [AND/CLR]
1.31 1.00 2.00 0.43 68% 68% Wait for flag [OR/CLR]
0.19 0.00 1.00 0.30 81% 81% Peek on flag
0.63 0.00 1.00 0.47 62% 37% Create alarm
1.44 1.00 2.00 0.49 56% 56% Initialize alarm
1.00 1.00 1.00 0.00 100% 100% Disable alarm
1.69 1.00 2.00 0.43 68% 31% Enable alarm
1.00 1.00 1.00 0.00 100% 100% Delete alarm
1.25 1.00 2.00 0.38 75% 75% Tick counter [1 alarm]
3.63 3.00 4.00 0.47 62% 37% Tick counter [many alarms]
2.06 2.00 3.00 0.12 93% 93% Tick & fire counter [1 alarm]
18.38 18.00 19.00 0.47 62% 62% Tick & fire counters [>1 together]
4.56 4.00 5.00 0.49 56% 43% Tick & fire counters [>1 separately]
3.00 3.00 3.00 0.00 100% 100% Alarm latency [0 threads]
3.00 3.00 3.00 0.00 100% 100% Alarm latency [2 threads]
3.00 3.00 3.00 0.00 100% 100% Alarm latency [many threads]
6.01 6.00 7.00 0.01 99% 99% Alarm -> thread resume latency
196 172 204 Worker thread stack used (stack size 1088)
All done, main thrd : stack used 796 size 1536
All done : Idlethread stack used 164 size 1280
Timing complete - 27280 ms total
PASS:<Basic timing OK>
EXIT:<done>| |  | |
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| 2024-03-18 | eCosPro Non-Commercial Public License |