Overview

In a typical development environment the SAMX70-EK board is programmed via a JTAG/SWD interface. This will either be by loading applications into the on-chip SRAM, or into on-chip flash memory. The following sections deal with JTAG/SWD hardware based debugging approaches.

When debugging via JTAG, you may need to disable the default HAL idle thread action, otherwise there may be issues where the target fails to halt and the debugging session is unreliable. More details can be found in the Cortex-M architectural HAL. If you are debugging via SWD this should not be necessary.

For debugging applications are loaded and then executed on the board via the debugger arm-eabi-gdb, or via the Eclipse IDE. The following describes setting up to use a Ronetix PEEDI debugger for use with GDB.

PEEDI

For the Ronetix PEEDI, the peedi.same70xpld.cfg or peedi.samv71xult.cfg file should be used to setup and configure the hardware to an appropriate state to load programs. These files only perform basic initialization by default, leaving application code to initialize PLLs and other clocks. However, these files also contain an alternate initialization section that will initialize the clocks and SDRAM from JTAG.

The configuration files also contains an option to define whether hardware or software breakpoints are used by default, using the CORE0_BREAKMODE directive in the [PLATFORM_CortexM3] section (NOTE: The PEEDI firmware identifies not just M3 CPUs with the CortexM3 tag). Edit this file if you wish to use hardware break points, and remember to restart the PEEDI to make the changes take effect. However, hardware breakpoints only work below address 0x20000000, so should only be used for applications stored in flash.

On the PEEDI, debugging can be performed either via the telnet interface or using arm-eabi-gdb and the GDB interface. In the case of the latter, arm-eabi-gdb needs to connect to TCP port 2000 on the PEEDI's IP address. For example:

(gdb) target remote 111.222.333.444:2000

By default when the PEEDI is powered up, the target will always run the initialization section of the configuration file, and halts the target. This behaviour is repeated with the PEEDI reset command.

If the board is reset (either with the 'reset', or by pressing the reset button) and the 'go' command is then given, then the board will boot as normal and run from the contents of the flash.

The JTAG, JTAGEXT, ROM and ROMEXT startup types default to output of all diagnostics information via USART1. The default communications parameters are 115200 baud, no parity, 1 stop bit. It is recommended that USART1 be accessed via the EDBG port.

It is possible to arrange for diagnostics to be output via the JTAG connection and appear on the gdb console. This requires the configuration option CYGFUN_HAL_GDB_FILEIO in the common HAL package to be enabled. This has two sub-options, CYGSEM_HAL_DIAG_TO_GDBFILEIO_CHAN and CYGSEM_HAL_DIAG_VIA_GDB_FILEIO_IMMEDIATE, that are enabled by default when CYGFUN_HAL_GDB_FILEIO is enabled and both should remain enabled. In this case, when arm-eabi-gdb is attached to the PEEDI, the following gdb command must be issued:

(gdb) set hwdebug on

Eclipse users can do this by creating a GDB command file with the contents:

define preload
  set hwdebug on
end

This will be referenced from their Eclipse debug launch configuration. Using GDB command files is described in more detail in the "Eclipse/CDT for eCos application development" manual.

Consult the PEEDI documentation for information on other features.