HAL Port — Implementation Details
This documentation explains how the eCos HAL specification has been mapped onto the MCB1700 board hardware, and should be read in conjunction with that specification. The MCB1700 platform HAL package complements the ARM architectural HAL and the LPC1XXX variant HAL. It provides functionality which is specific to the target board.
Following a hard or soft reset the HAL will initialize or reinitialize many of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.
For ROM and JTAG startup, the HAL will perform additional
initialization, programming the various internal registers
including the PLL, peripheral clocks and GPIO pins. The details
of the early hardware startup may be found in the
src/mcb1700_misc.c in both
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- Internal RAM
This is located at addresses 0x10000000 and 0x2007C000 of the memory space, and is 64KiB in size, divided into two 32KiB blocks. The eCos VSR table occupies 512 bytes at 0x10000000. The virtual vector table starts at 0x10000200 and extends to 0x10000300. The top
CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZEbytes down from 0x10008000 are reserved for the interrupt stack.
The second 32KiB block is divided into two 16KiB parts, reflecting its organization in the hardware. The lower 16KiB, at 0x2007C000, are available for application use. The upper 16KiB, at 0x20080000, are used by the ethernet driver for packet buffers. If the ethernet device is not used, this memory may be used by applications.
- Internal FLASH
- This is located at address 0x00000000 of the memory space. This region is 512KiB in size. ROM applications are by default configured to run from this memory.
- On-Chip Peripherals
- These are accessible at locations 0x40000000 and 0xE0000000 upwards. Descriptions of the contents can be found in the LPC1XXX User Manual.
The platform linker scripts define the following symbols:
- This defines the location of the VSR table. This is set to 0x10000000 for all startup types, and space for 128 entries is reserved.
- This defines the location of the virtual vector table used to communicate between an ROM monitor and an eCos application. This is allocated right after the VSR table, at 0x10000200. To permit expansion and possible addition of other tables, the linker scripts then allocate further sections from 0x10000400.
- This defines the location of the interrupt stack. For all startups, this is allocated to the top of internal SRAM, 0x10008000.
- This defines the location of the startup stack. For all startup types it is initially allocated at the half-way point of the interrupt stack.
|2021-10-22||eCosPro Non-Commercial Public License|