On-chip Subsystems and Peripherals — Hardware Support

Hardware support

The IMX family contains many on-chip peripherals.

On-chip memory

The IMX parts include on-chip SRAM. The RAM can vary in size from as little as 4KiB to 512KiB. Support is also available for external FLASH and SDRAM.

Typically, an eCos platform HAL port will expect a RedBoot image to be programmed into boot memory for development, and the board would boot this image from reset. RedBoot provides GDB stub functionality so it is then possible to download and debug stand-alone and eCos applications via the gdb debugger using serial interfaces or other debug channels. The JTAG interface may also be used for development if a suitable JTAG adaptor is available. If RedBoot is present it may also be used to manage the external flash memory. For production purposes, applications are programmed into external FLASH and may be self-booting. Applications may also be loaded into memory using a RedBoot startup script.

Cache Handling

The RT10XX variants contain an instruction and data cache controller defined as part of the Cortex-M architectural specification. Support for this controller is supplied by the architecture HAL.

Serial I/O

The IMX variant HAL supports basic polled HAL diagnostic I/O over any of the on-chip serial devices. There is also a fully interrupt-driven serial device driver suitable for eCos applications for all on-chip serial devices. The serial driver consists of an eCos package: CYGPKG_IO_SERIAL_NXP_LPUART which provides support for the IMX on-chip serial devices. Using the HAL diagnostic I/O support, any of these devices can be used by the ROM monitor or RedBoot for communication with GDB. If a device is needed by the application, either directly or via the serial driver, then it cannot also be used for GDB communication using the HAL I/O support. An alternative serial port should be used instead.

The HAL defines CDL interfaces, CYGINT_HAL_CORTEXM_IMX_UART1 to CYGINT_HAL_CORTEXM_IMX_UART8 for each of the available UARTs. The platform HAL CDL should contain an implements directive for each such UART that is available for use on the board. This will enable use of the UART for diagnostic use.


The IMX HAL relies on the architectural HAL to provide support for the interrupts directly routed to the NVIC. The cyg/hal/var_intr.h header defines the vector mapping for these.

Pin Multiplexing and GPIO

The variant HAL provides support for packaging the pin, GPIO and daisy chain configurations of an external line into 32-bit descriptors that can then be used with macros to configure the pin and set and read its value. Details are supplied later.


eCos includes device drivers for the on-chip watchdog in the IMX family. This is located in the package CYGPKG_DEVICES_WALLCLOCK_NXP ("NXP wallclock driver").

Clock Control

The platform HAL must provide the input oscillator frequency (CYGHWR_HAL_CORTEXM_IMX_OSC_MAIN) in its CDL file. Under normal circumstances this is set to 24MHz.

The actual values of the clock frequencies, is stored in a global structure, hal_imx_clock, which contains the PLL frequencies, PFDs and root clocks. The clock supplied to the SysTick timer is also assigned to hal_cortexm_systick_clock. These variables are set by examining the actual hardware register so they reflect settings made by any bootloader or JTAG adaptor.

Note that when changing or configuring any of these clock settings, you should consult the relevant processor datasheet as there may be both upper and lower constraints on the frequencies of some clock signals, including intermediate clocks. There are also some clocks where, while there is no strict constraint, clock stability is improved if values are chosen wisely. Finally, be aware that increasing clock speeds using this package may have an effect on platform specific properties, such as memory timings which may have to be adjusted accordingly.