Name

HAL Port — Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the Broadcom BCM943364WCD1 module hardware and should be read in conjunction with the specification for that device. The BCM943364WCD1 platform HAL package complements the Cortex-M architectural HAL and the STM32 variant HAL. It provides functionality which is specific to the target module, and optionally, specifically supported motherboards.

Targetting the eCos platform bcm943364wcd1 will configure eCos for a stand-alone BCM943364WCD1 module with no assumption made about the I/O connected to the module TP pins.

Targetting the bcm943364wcd1_evb platform will configure eCos for a BCM9WCD9EVAL1 motherboard based module, and provide access to the LEDs, switches, thermistor and SPI flash device available on that motherboard.

Startup

Following a hard or soft reset the HAL will initialize or reinitialize many of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

For the stand-alone application startup types, the HAL will perform additional initialization, programming the various internal registers including the PLL, peripheral clocks and GPIO pins. The details of the early hardware startup may be found in the src/bcm943364wcd1_misc.c in both the hal_system_init and hal_platform_init functions.

Memory Map

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

Internal RAM
This is located at address 0x20000000 of the memory space, and is 128KiB in size. The eCos VSR table always occupies the initial bytes at the base of this memory, followed by the optional virtual vector table depending on the eCos configuration. The top CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE bytes of memory are reserved for the interrupt stack. The remainder of on-chip SRAM is available for use by applications.
Internal FLASH
This is located at address 0x08000000 of the memory space and will be mapped to 0x00000000 at reset. This region is 512KiB in size. and ROM applications are by default configured to run from this memory.
On-Chip Peripherals
These are accessible at locations 0x40000000 and 0xE0000000 upwards. Descriptions of the contents can be found in the relevant STM32 User Manual.

Linker Scripts

The platform linker scripts define the following symbols:

hal_vsr_table
This defines the location of the VSR table. This is set to 0x20000000 for all startup types, and space for CYGNUM_HAL_VSR_COUNT entries is reserved to match the use of a STM32F2 processor.
hal_virtual_vector_table

This defines the location of the virtual vector table used to communicate between an ROM monitor and an eCos application. This is allocated right after the VSR table, and is normally 0x20000198 for STM32F4 targets.

The CDL option CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT defines whether this virtual vector support is needed. If not defined then the table is zero sized.

hal_virtual_vector_table_end
This defines the location of the end of the (optional) virtual vector table.
hal_interrupt_stack
This defines the location of the interrupt stack. For all startup types this is allocated to the top of internal SRAM, at 0x20020000.
hal_startup_stack
This defines the location of the startup stack. For all startup types it is initially allocated at the half-way point of the interrupt stack. The size of the interrupt stack is defined by the CDL option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE.

Flash wait states

The BCM943364WCD1 platform HAL provides a configuration option to set the number of Flash read wait states to use: CYGNUM_HAL_CORTEXM_STM32_FLASH_WAIT_STATES. It is important to verify and if necessary update this value if changing the CPU clock (HCLK) frequency or CPU voltage. Consult the STM32 Flash programming manual (PM0059) for appropriate values for different clock speeds or voltages. The default of 3 reflects a supply voltage of 3.3V and HCLK of 100MHz.

Diagnostic LEDs

The platform HAL header file at <cyg/hal/plf_io.h> defines the following convenience function to allow any LEDs to be set:

extern void hal_bcm943364wcd1_led(unsigned char c);

The low-order bits of the argument c correspond to individual LEDs.

The default BCM943364WCD1 module support does not provide LEDs, since the relevant off-module GPIO signals are not defined. However, when targetting the BCM9WCD9EVAL1 motherboard two LEDs are fitted for diagnostic purposes: D4 (red) and D3 (green). These LEDs are free for application use. The bcm943364wcd1_evbmanual test provides a simple example of changing the LED state.

Real-time characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built for the bcm943364wcd1_evb platform using the SRAM startup type and optimization flag -O2.

Example 273.1. bcm943364wcd1 Real-time characterization

             Startup, main thrd : stack used   352 size  1536
             Startup : Idlethread stack used    84 size  1280

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 0 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took    8.50 microseconds (8 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                   8
   Thread switches:         128
   Mutexes:                  16
   Mailboxes:                16
   Semaphores:               16
   Scheduler operations:    128
   Counters:                 16
   Flags:                    16
   Alarms:                   16
   Stack Size:             1088


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
INFO:<Ctrl-C disabled until test completion>
    7.13    7.00    8.00    0.22   87%  87% Create thread
    1.50    1.00    2.00    0.50  100%  50% Yield thread [all suspended]
    1.50    1.00    2.00    0.50  100%  50% Suspend [suspended] thread
    1.50    1.00    2.00    0.50  100%  50% Resume thread
    2.25    2.00    3.00    0.38   75%  75% Set priority
    0.38    0.00    1.00    0.47   62%  62% Get priority
    4.50    4.00    5.00    0.50  100%  50% Kill [suspended] thread
    1.50    1.00    2.00    0.50  100%  50% Yield [no other] thread
    2.50    2.00    3.00    0.50  100%  50% Resume [suspended low prio] thread
    1.63    1.00    2.00    0.47   62%  37% Resume [runnable low prio] thread
    2.13    2.00    3.00    0.22   87%  87% Suspend [runnable] thread
    1.38    1.00    2.00    0.47   62%  62% Yield [only low prio] thread
    1.50    1.00    2.00    0.50  100%  50% Suspend [runnable->not runnable]
    4.75    4.00    5.00    0.38   75%  25% Kill [runnable] thread
    3.88    3.00    4.00    0.22   87%  12% Destroy [dead] thread
    7.25    7.00    8.00    0.38   75%  75% Destroy [runnable] thread
    8.13    8.00    9.00    0.22   87%  87% Resume [high priority] thread
    2.84    2.00    4.00    0.29   82%  17% Thread switch

    0.37    0.00    1.00    0.46   63%  63% Scheduler lock
    1.35    1.00    2.00    0.46   64%  64% Scheduler unlock [0 threads]
    1.35    1.00    2.00    0.46   64%  64% Scheduler unlock [1 suspended]
    1.35    1.00    2.00    0.46   64%  64% Scheduler unlock [many suspended]
    1.35    1.00    2.00    0.46   64%  64% Scheduler unlock [many low prio]

    0.44    0.00    1.00    0.49   56%  56% Init mutex
    1.81    1.00    2.00    0.31   81%  18% Lock [unlocked] mutex
    2.06    2.00    3.00    0.12   93%  93% Unlock [locked] mutex
    1.81    1.00    2.00    0.31   81%  18% Trylock [unlocked] mutex
    1.69    1.00    2.00    0.43   68%  31% Trylock [locked] mutex
    0.44    0.00    1.00    0.49   56%  56% Destroy mutex
    9.06    9.00   10.00    0.12   93%  93% Unlock/Lock mutex

    0.75    0.00    1.00    0.38   75%  25% Create mbox
    0.19    0.00    1.00    0.30   81%  81% Peek [empty] mbox
    2.00    2.00    2.00    0.00  100% 100% Put [first] mbox
    0.19    0.00    1.00    0.30   81%  81% Peek [1 msg] mbox
    2.00    2.00    2.00    0.00  100% 100% Put [second] mbox
    0.31    0.00    1.00    0.43   68%  68% Peek [2 msgs] mbox
    1.94    1.00    2.00    0.12   93%   6% Get [first] mbox
    1.94    1.00    2.00    0.12   93%   6% Get [second] mbox
    1.00    1.00    1.00    0.00  100% 100% Tryput [first] mbox
    1.44    1.00    2.00    0.49   56%  56% Peek item [non-empty] mbox
    1.75    1.00    2.00    0.38   75%  25% Tryget [non-empty] mbox
    1.56    1.00    2.00    0.49   56%  43% Peek item [empty] mbox
    1.50    1.00    2.00    0.50  100%  50% Tryget [empty] mbox
    0.38    0.00    1.00    0.47   62%  62% Waiting to get mbox
    0.25    0.00    1.00    0.38   75%  75% Waiting to put mbox
    1.00    1.00    1.00    0.00  100% 100% Delete mbox
    6.25    6.00    7.00    0.38   75%  75% Put/Get mbox

    0.44    0.00    1.00    0.49   56%  56% Init semaphore
    1.44    1.00    2.00    0.49   56%  56% Post [0] semaphore
    2.00    2.00    2.00    0.00  100% 100% Wait [1] semaphore
    1.38    1.00    2.00    0.47   62%  62% Trywait [0] semaphore
    1.50    1.00    2.00    0.50  100%  50% Trywait [1] semaphore
    0.50    0.00    1.00    0.50  100%  50% Peek semaphore
    0.50    0.00    1.00    0.50  100%  50% Destroy semaphore
    5.50    5.00    6.00    0.50  100%  50% Post/Wait semaphore

    0.75    0.00    1.00    0.38   75%  25% Create counter
    0.50    0.00    1.00    0.50  100%  50% Get counter value
    0.31    0.00    1.00    0.43   68%  68% Set counter value
    1.88    1.00    2.00    0.22   87%  12% Tick counter
    0.44    0.00    1.00    0.49   56%  56% Delete counter

    0.50    0.00    1.00    0.50  100%  50% Init flag
    1.94    1.00    2.00    0.12   93%   6% Destroy flag
    1.50    1.00    2.00    0.50  100%  50% Mask bits in flag
    1.81    1.00    2.00    0.31   81%  18% Set bits in flag [no waiters]
    2.50    2.00    3.00    0.50  100%  50% Wait for flag [AND]
    2.38    2.00    3.00    0.47   62%  62% Wait for flag [OR]
    2.50    2.00    3.00    0.50  100%  50% Wait for flag [AND/CLR]
    2.31    2.00    3.00    0.43   68%  68% Wait for flag [OR/CLR]
    0.31    0.00    1.00    0.43   68%  68% Peek on flag

    1.19    1.00    2.00    0.30   81%  81% Create alarm
    2.38    2.00    3.00    0.47   62%  62% Initialize alarm
    1.44    1.00    2.00    0.49   56%  56% Disable alarm
    2.50    2.00    3.00    0.50  100%  50% Enable alarm
    1.31    1.00    2.00    0.43   68%  68% Delete alarm
    2.19    2.00    3.00    0.30   81%  81% Tick counter [1 alarm]
    6.56    6.00    7.00    0.49   56%  43% Tick counter [many alarms]
    3.75    3.00    4.00    0.38   75%  25% Tick & fire counter [1 alarm]
   31.38   31.00   32.00    0.47   62%  62% Tick & fire counters [>1 together]
    8.00    8.00    8.00    0.00  100% 100% Tick & fire counters [>1 separately]
    8.00    8.00    8.00    0.00  100% 100% Alarm latency [0 threads]
    7.23    6.00    8.00    0.38   73%   1% Alarm latency [2 threads]
    7.13    6.00    8.00    0.43   63%  11% Alarm latency [many threads]
   12.01   12.00   13.00    0.01   99%  99% Alarm -> thread resume latency

    0.00    0.00    0.00    0.00            Clock/interrupt latency

    3.66    2.00    4.00    0.00            Clock DSR latency

     192     172     204                    Worker thread stack used (stack size 1088)
            All done, main thrd : stack used   796 size  1536
            All done : Idlethread stack used   172 size  1280

Timing complete - 29320 ms total

PASS:<Basic timing OK>
EXIT:<done>