HAL Port — Implementation Details
This documentation explains how the eCos HAL specification has been mapped onto the VPB926EJS hardware, and should be read in conjunction with that specification. The VPB926EJS platform HAL package complements the ARM architectural HAL and the ARM9 variant HAL. It provides functionality which is specific to the target board.
Following a hard or soft reset the HAL will initialize or reinitialize the on-chip peripherals that are used by eCos. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.
For ROM, ROMRAM or SRAM startup, the HAL will perform additional
initialization, setting up the external SDRAM and programming the
various internal registers. This is all done in the
PLATFORM_SETUP1 macro in the assembler
Linker Scripts and Memory Maps
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- This is located at address 0x34000000 of the physical memory space. The HAL uses the MMU to map it cached and buffered at the same address.
- There are two blocks of SDRAM in the system. One block of 64Mb is present at physical address 0x00000000 and is echoed at 0x04000000. The second block is present at physical address 0x08000000. The HAL uses the MMU to map the first block to virtual address 0x00000000 and the second to virtual address 0x04000000, forming a single contiguous 128Mb block of SDRAM starting at 0x00000000. The same memory is also accessible uncached and unbuffered at virtual location 0x70000000 for use by devices. The first 32 bytes are used for hardware exception vectors. The next 32 bytes are used for the VSR table and the next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. For ROM/ROMRAM startup, all remaining SDRAM is available. For RAM startup, available RAM starts at virtual location 0x00040000, with the bottom 256kB reserved for use by RedBoot.
- On-chip SRAM
- This is located at address 0x38000000 of the physical memory space. The HAL uses the MMU to map this to the same virtual address, but cached and buffered. The same memory is also accessible uncached and unbuffered at virtual location 0x78000000 for use by devices. This memory is not used by eCos for any purpose except in the SRAM startup mode, when it contains the system image.
- On-chip Peripheral Registers
- These are located at address 0x10000000 in the physical memory space. When the MMU is enabled, it sets up a direct, uncached, unbuffered mapping so that these registers remain accessible at their physical locations.
- Off-chip Peripherals
- All off-chip peripherals are also visible in the 0x10000000 address space.
The VPB926EJS platform HAL does not affect the implementation of other parts of the eCos HAL specification. The ARM9 variant HAL, and the ARM architectural HAL documentation should be consulted for further details.
|2023-01-12||eCosPro Non-Commercial Public License|