Ronetix PEEDI notes

On the Ronetix PEEDI, the peedi.at91sam9263ek.cfg file should be used to setup and configure the hardware to an appropriate state to load programs. This includes setting up the SDRAM controller.

The peedi.at91sam9263ek.cfg file also contains an option to define whether hardware or software breakpoints are used by default, using the CORE0_BREAKMODE directive in the [PLATFORM_ARM] section. Edit this file if you wish to use hardware break points, and remember to restart the PEEDI to make the changes take effect.

On the PEEDI, debugging can be performed either via the telnet interface or using arm-eabi-gdb and the GDB interface. In the case of the latter, arm-eabi-gdb needs to connect to TCP port 2000 on the PEEDI's IP address. For example:

(gdb) target remote 111.222.333.444:2000

By default when the PEEDI is powered up, the target will always run the initialization section of the peedi.at91sam9263ek.cfg file (which configures the SDRAM among other things), and halts the target. This behavior is repeated with the reset command.

If the board is reset (either with the 'reset', or by pressing the reset button) and the 'go' command is then given, then the board will boot as normal. If a second-level bootstrap and ROM RedBoot is resident in DataFlash, it will be run.

An issue occurs when the AT91 Ethernet driver is included in your configuration. In order to work around a board hardware design issue, the CPU generates an external reset in order to reset the Ethernet PHY. However this can be interpreted by the PEEDI as an indication that the CPU itself has reset, and if the PEEDI configuration file option CORE0_STARTUP_MODE is set to RESET then the CPU will be halted at this point. To avoid this issue, the CORE0_STARTUP_MODE can be set to RUN.

Consult the PEEDI documentation for information on other features.

Running JTAG applications

Applications configured for JTAG startup can be run directly under a JTAG debugger. Once loaded and running via JTAG, HAL diagnostic output will appear by default on the serial debug port. USARTs 0 or 1 can be chosen instead by setting the CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL configuration option in the platform HAL to channel 1 or 2.