Configuration

Configuration
	Chapter 251. Phytec phyCORE LPC2294 Board Support

Overview

The phycore platform HAL package is loaded automatically when eCos is configured for an phycore_lpc2294 target. It should never be necessary to load this package explicitly. Unloading the package should only happen as a side effect of switching target hardware.

Startup

The phyCORE LPC229x platform HAL package supports two separate startup types:

RAM: This is the startup type which is normally used during application development. The board has RedBoot programmed into flash at location 0x0 in internal on-chip Flash and boots from that location. arm-eabi-gdb is then used to load a RAM startup application into memory and debug it. It is assumed that the hardware has already been initialized by the stubrom. By default the application will use the eCos virtual vectors mechanism to obtain certain services from the stubrom, including diagnostic output.
ROM: This startup type can be used for finished applications which will be programmed into internal flash at location 0x0. The application will be self-contained with no dependencies on services provided by other software. eCos startup code will perform all necessary hardware initialization.

RedBoot and Virtual Vectors

If the application is intended to act as a ROM monitor, providing services for other applications, then the configuration option CYGSEM_HAL_ROM_MONITOR should be set. Typically this option is set only when building RedBoot.

If the application is supposed to make use of services provided by a ROM monitor, via the eCos virtual vector mechanism, then the configuration option CYGSEM_HAL_USE_ROM_MONITOR should be set. By default this option is enabled when building for a RAM startup, disabled otherwise. It can be manually disabled for a RAM startup, making the application self-contained, or as a testing step before switching to ROM startup.

If the application does not rely on a ROM monitor for diagnostic services then serial port UART0 will be claimed for HAL diagnostics.

Flash Driver

The phyCORE LPC2294 board contains a number of AMD flash devices. The CYGPKG_DEVS_FLASH_AMD_AM29XXXXX_V2 package contains all the code necessary to support these parts and the CYGPKG_DEVS_FLASH_ARM_PHYCORE package contains definitions that customize the driver to the phyCORE LPC2294 board.

Ethernet Driver

The phyCORE-LPC229x board contains an SMSC LAN91C111 ethernet MAC. The CYGPKG_DEVS_ETH_SMSC_LAN91CXX package contains all the code necessary to support this device and the CYGPKG_DEVS_ETH_ARM_PHYCORE package contains definitions that customize the driver to the phyCORE LPC2294 board.

System Clock

By default, the system clock interrupts once every 10ms, corresponding to a 100Hz clock. This can be changed by the configuration option CYGNUM_HAL_RTC_DENOMINATOR which corresponds to the clock frequency. Other clock-related settings are recalculated automatically if the denominator is changed. The PLL multipliers and dividers may be configured to allow a core clock (CCLK) speed of up to 60MHz. The description of the clock-related CDL options may be found in the LPC2xxx variant HAL documentation.

Memory Configuration

The PhyCORE LPC2294 board can be fitted with a wide range of flash and SRAM parts. The following options adjust the configuration of eCos and RedBoot to accommodate these variations:

CYGHWR_HAL_ARM_LPC2XXX_PHYCORE_MEMORY_CONFIGURATION_FLASH: This option describes the flash devices fitted to the board. Possible values are: AM29DL800BT, AM29LV800BT, AM29LV160BT and AM29LV320BT. Of these only the AM29DL800BT and AM29LV320BT variants have been tested.
CYGHWR_HAL_ARM_LPC2XXX_PHYCORE_MEMORY_CONFIGURATION_FLASH_COUNT: This option defines the number of flash devices fitted. Flash devices can only be fitted in pairs, and there is only space for up to 4, so this value can only be 2 or 4.
CYGHWR_HAL_ARM_LPC2XXX_PHYCORE_MEMORY_CONFIGURATION_SRAM_SIZE: This option defines the total SRAM size. The board can be fitted with two or four SRAM devices, of 512KB, 1MB or 2MB each, giving Possible possible SRAM sizes of: 0x100000, 0x200000, 0x400000 or 0x800000.

Compiler Flags

The platform HAL defines the default compiler and linker flags for all packages, although it is possible to override these on a per-package basis. Most of the flags used are the same as for other architectures supported by eCos.

However there are two flags that are used if Thumb mode is to be supported:

-mthumb: The arm-eabi-gcc compiler will compile C and C++ files into the Thumb instruction set when this option is used.
-mthumb-interwork: This option allows programs to be created that mix ARM and Thumb instruction sets. Without this option, some memory can be saved. This option should be used if -mthumb is used.


Setup		The HAL Port

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