HAL Port — Implementation Details


This documentation explains how the eCos HAL specification has been mapped onto the MX1ADS/A hardware, and should be read in conjunction with that specification. The MX1ADS/A platform HAL package complements the ARM architectural HAL and the ARM9 variant HAL. It provides functionality which is specific to the target board.


Following a hard or soft reset the HAL will initialize or reinitialize the on-chip peripherals that it uses. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

For ROM or ROMRAM startup, the HAL will perform additional initialization, setting up the external RAM and programming the various internal registers. This is all done in the PLATFORM_SETUP1 macro in the assembler header file hal_platform_setup.h.

For SRAM startup, minimal initialization is performed, and it is assumed that the JTAG device has initialized the hardware as described earlier.

Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:


This is located at address 0x08000000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x00000000. The same memory is also accessible uncached and unbuffered at virtual location 0x04000000 for use by devices. The first 32 bytes are used for hardware exception vectors. The next 32 bytes are used for the VSR table and the next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. For ROM/ROMRAM startup, all remaining SDRAM is available. For RAM startup, available RAM starts at virtual location 0x00040000, with the bottom 256kB reserved for use by RedBoot.

In the SRAM startup configuration, the SDRAM remains at its physical address of 0x08000000, since the MMU is not enabled.

This is located at address 0x10000000 of the physical memory space. It is mapped by the HAL using the MMU to the same virtual address with caching and the write buffer enabled.
On-chip Peripheral Registers

These are located at address 0x00200000 in the physical memory space. When the MMU is enabled, it sets up a direct, uncached, unbuffered mapping for these at 0xA0000000 in the virtual address space.

All hardware addresses in mc9328mxl.h give the physical address. To use these, the macro CYGARC_VIRTUAL_ADDRESS() should be applied to these. This will yield the correct address depending on the startup type.

Ethernet MAC
The Cirrus Logic CS8900A is addressed by Chip Select 4, and is located at physical address 0x15000000. It is mapped uncached and unbuffered to the same virtual address when the MMU is enabled.

Other Issues

The MX1ADS/A platform HAL does not affect the implementation of other parts of the eCos HAL specification. The ARM9 variant HAL, and the ARM architectural HAL documentation should be consulted for further details.