Name
HAL Port — Implementation Details
Overview
This documentation explains how the eCos HAL specification has been mapped onto the IAR KickStart board hardware, and should be read in conjunction with that specification. The KickStart Board platform HAL package complements the ARM architectural HAL and the LPC2xxx variant HAL. It provides functionality which is specific to the target board.
Startup
Following a hard or soft reset the HAL will initialize or reinitialize many of the on-chip peripherals. This includes the PINSEL functions and LED bank. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.
For ROM startup, the HAL will perform additional initialization,
programming the various internal registers including PLL (for the
clocks), Memory Mapping control registers to map SRAM to 0x0, and
Memory Acceleration Module (MAM). The details of the early hardware
startup may be found in the header cyg/hal/hal_platform_setup.h
.
Linker Scripts and Memory Maps
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- on-chip Flash
- This is located at address 0x0 of the memory space, although after hardware initialization, the start of internal SRAM is mapped over locations 0x0 to 0x40. The size of this region depends on the LPC2xxx microcontroller variant in use. In the case of the LPC2106, the region is of size 128Kbytes, ending at 0x20000. However the last few blocks of Flash are reserved for use as bootblocks for the ISP/IAP firmware, resulting in a usable Flash size of 120Kbytes, ending at 0x1e000. The MAM is enabled to accelerate memory reads from this area.
- internal SRAM
- This is located at address 0x40000000 of the memory space, and is 16, 32 or 64k in size, depending on the chip fitted. The first 64 bytes are mapped to location 0x0000000. If using GDB stubs ROM, or another ROM monitor, the virtual vector table starts at 0x40000050 and extends to 0x40000150. The remainder of SRAM is available for use by applications. For RAM startup applications, SRAM below 0x40001000 is reserved for the GDB stubrom and the remainder is available for the application. An exception is if the on-chip Flash driver is to be used. In that case, the top 32 bytes of SRAM are used by it. This is automatically handled in the port's memory layout files if the flash driver is present in the configuration.
- on-chip peripherals
- These are accessible at location 0xE0000000 onwards. Descriptions of the contents can be found in the LPC2xxx User Manual for the appropriate microcontroller variant.
Real-time characterization
The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM mode, which provided better performance than Thumb mode.
Example 245.1. iar_kickstart Real-time characterization
Startup, main stack : stack used 420 size 3920 Startup : Interrupt stack used 148 size 4096 Startup : Idlethread stack used 80 size 2048 eCos Kernel Timings Notes: all times are in microseconds (.000001) unless otherwise stated Reading the hardware clock takes 0 'ticks' overhead ... this value will be factored out of all other measurements Clock interrupt took 14.94 microseconds (8 raw clock ticks) Testing parameters: Clock samples: 32 Threads: 2 Thread switches: 128 Mutexes: 32 Mailboxes: 32 Semaphores: 32 Scheduler operations: 128 Counters: 32 Flags: 32 Alarms: 32 Confidence Ave Min Max Var Ave Min Function ====== ====== ====== ====== ========== ======== 13.56 13.56 13.56 0.00 100% 100% Create thread 3.39 3.39 3.39 0.00 100% 100% Yield thread [all suspended] 4.24 3.39 5.09 0.85 100% 50% Suspend [suspended] thread 3.39 3.39 3.39 0.00 100% 100% Resume thread 5.09 5.09 5.09 0.00 100% 100% Set priority 1.70 1.70 1.70 0.00 100% 100% Get priority 11.87 11.87 11.87 0.00 100% 100% Kill [suspended] thread 4.24 3.39 5.09 0.85 100% 50% Yield [no other] thread 5.93 5.09 6.78 0.85 100% 50% Resume [suspended low prio] thread 4.24 3.39 5.09 0.85 100% 50% Resume [runnable low prio] thread 5.93 5.09 6.78 0.85 100% 50% Suspend [runnable] thread 3.39 3.39 3.39 0.00 100% 100% Yield [only low prio] thread 3.39 3.39 3.39 0.00 100% 100% Suspend [runnable->not runnable] 11.87 11.87 11.87 0.00 100% 100% Kill [runnable] thread 8.48 8.48 8.48 0.00 100% 100% Destroy [dead] thread 15.26 15.26 15.26 0.00 100% 100% Destroy [runnable] thread 22.04 20.35 23.74 1.70 100% 50% Resume [high priority] thread 8.38 6.78 11.87 0.23 92% 7% Thread switch 1.38 0.00 1.70 0.52 81% 18% Scheduler lock 3.31 1.70 3.39 0.15 95% 4% Scheduler unlock [0 threads] 3.31 1.70 3.39 0.15 95% 4% Scheduler unlock [1 suspended] 3.31 1.70 3.39 0.15 95% 4% Scheduler unlock [many suspended] 3.31 1.70 3.39 0.15 95% 4% Scheduler unlock [many low prio] 1.75 1.70 3.39 0.10 96% 96% Init mutex 4.24 3.39 5.09 0.85 100% 50% Lock [unlocked] mutex 4.82 3.39 5.09 0.45 84% 15% Unlock [locked] mutex 4.08 3.39 5.09 0.82 59% 59% Trylock [unlocked] mutex 3.71 3.39 5.09 0.52 81% 81% Trylock [locked] mutex 1.38 0.00 1.70 0.52 81% 18% Destroy mutex 20.35 20.35 20.35 0.00 100% 100% Unlock/Lock mutex 1.96 1.70 3.39 0.45 84% 84% Create mbox 1.38 0.00 1.70 0.52 81% 18% Peek [empty] mbox 4.50 3.39 5.09 0.76 65% 34% Put [first] mbox 1.27 0.00 1.70 0.64 75% 25% Peek [1 msg] mbox 4.56 3.39 5.09 0.73 68% 31% Put [second] mbox 1.22 0.00 1.70 0.68 71% 28% Peek [2 msgs] mbox 4.56 3.39 5.09 0.73 68% 31% Get [first] mbox 4.56 3.39 5.09 0.73 68% 31% Get [second] mbox 3.97 3.39 5.09 0.76 65% 65% Tryput [first] mbox 3.39 3.39 3.39 0.00 100% 100% Peek item [non-empty] mbox 4.40 3.39 5.09 0.82 59% 40% Tryget [non-empty] mbox 3.66 3.39 5.09 0.45 84% 84% Peek item [empty] mbox 3.92 3.39 5.09 0.73 68% 68% Tryget [empty] mbox 1.38 0.00 1.70 0.52 81% 18% Waiting to get mbox 1.43 0.00 1.70 0.45 84% 15% Waiting to put mbox 2.44 1.70 3.39 0.83 56% 56% Delete mbox 13.88 13.56 15.26 0.52 81% 81% Put/Get mbox 1.70 1.70 1.70 0.00 100% 100% Init semaphore 3.71 3.39 5.09 0.52 81% 81% Post [0] semaphore 3.97 3.39 5.09 0.76 65% 65% Wait [1] semaphore 3.66 3.39 5.09 0.45 84% 84% Trywait [0] semaphore 3.60 3.39 5.09 0.37 87% 87% Trywait [1] semaphore 1.75 1.70 3.39 0.10 96% 96% Peek semaphore 1.70 1.70 1.70 0.00 100% 100% Destroy semaphore 13.56 13.56 13.56 0.00 100% 100% Post/Wait semaphore 2.01 1.70 3.39 0.52 81% 81% Create counter 1.70 1.70 1.70 0.00 100% 100% Get counter value 1.22 0.00 1.70 0.68 71% 28% Set counter value 4.13 3.39 5.09 0.83 56% 56% Tick counter 1.43 0.00 1.70 0.45 84% 15% Delete counter 1.70 1.70 1.70 0.00 100% 100% Init flag 4.13 3.39 5.09 0.83 56% 56% Destroy flag 3.50 3.39 5.09 0.20 93% 93% Mask bits in flag 4.03 3.39 5.09 0.79 62% 62% Set bits in flag [no waiters] 5.40 5.09 6.78 0.52 81% 81% Wait for flag [AND] 5.30 5.09 6.78 0.37 87% 87% Wait for flag [OR] 5.30 5.09 6.78 0.37 87% 87% Wait for flag [AND/CLR] 5.35 5.09 6.78 0.45 84% 84% Wait for flag [OR/CLR] 1.22 0.00 1.70 0.68 71% 28% Peek on flag 2.70 1.70 3.39 0.82 59% 40% Create alarm 6.46 5.09 6.78 0.52 81% 18% Initialize alarm 3.81 3.39 5.09 0.64 75% 75% Disable alarm 6.04 5.09 6.78 0.83 56% 43% Enable alarm 4.29 3.39 5.09 0.84 53% 46% Delete alarm 4.82 3.39 5.09 0.45 84% 15% Tick counter [1 alarm] 22.15 22.04 23.74 0.20 93% 93% Tick counter [many alarms] 8.05 6.78 8.48 0.64 75% 25% Tick & fire counter [1 alarm] 138.82 137.33 139.03 0.37 87% 12% Tick & fire counters [>1 together] 25.70 25.43 27.13 0.45 84% 84% Tick & fire counters [>1 separately] 13.56 13.56 13.56 0.00 100% 100% Alarm latency [0 threads] 15.54 13.56 18.65 1.49 50% 32% Alarm latency [2 threads] 15.54 13.56 18.65 1.49 50% 32% Alarm latency [many threads] 27.14 27.13 28.82 0.02 99% 99% Alarm -> thread resume latency 3.39 3.39 3.39 0.00 Clock/interrupt latency 7.93 6.78 11.87 0.00 Clock DSR latency 272 272 272 (main stack: 764) Thread stack used (1360 total) All done, main stack : stack used 764 size 3920 All done : Interrupt stack used 204 size 4096 All done : Idlethread stack used 248 size 2048 Timing complete - 30220 ms total PASS:<Basic timing OK> EXIT:<done>
LED use
LEDs are available on the KickStart boards although most of these are attached to lines associated with peripherals. However 4 LEDS are available for application use from C. The following C function may be used:
#include <cyg/infra/hal_diag.h> extern void hal_diag_led(int leds);
Values from 0 to 15 will be displayed on the LED bank representing the binary value with 1 being on and 0 being off. The LEDs used are connected to P0.10-P0.13 P0.13 being the MSB, and P0.10 the LSB.
The LEDs are also used during platform initialization and only P0.10 should be illuminated if booting has been successful. Other LED indications represent the stage in the initialization process that failed.
Other Issues
The following pin assignments are configured by default for LPC2106 at board initialisation time:
PINSEL0:
P0.0/P0.1 for UART0
P0.2/P0.3 for I2C
P0.4/P0.5/P0.6/P0.7 for SPI
P0.8/P0.9 for UART1
P0.10-P0.13 as GPIO-controlled LEDs
P0.14 EINT1
P0.15 EINT2
PINSEL1:
P0.16 EINT0
P0.17-P0.21 as GPIO, although in practice these are used for JTAG
if a JTAG unit is connected.
P0.22-P0.31 as GPIO inputs
2024-03-18 | eCosPro Non-Commercial Public License |