| The HAL Port | ||
|---|---|---|
 | Chapter 244. Embedded Artists QuickStart Board Support |  |
Name
HAL Port — Implementation Details
Overview
This documentation explains how the eCos HAL specification has been mapped onto the EA QuickStart board hardware, and should be read in conjunction with that specification. The QuickStart Board platform HAL package complements the ARM architectural HAL and the LPC2xxx variant HAL. It provides functionality which is specific to the target board.
Startup
Following a hard or soft reset the HAL will initialize or reinitialize many of the on-chip peripherals. This includes the PINSEL functions and LED bank. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.
For ROM startup, the HAL will perform additional initialization,
programming the various internal registers including PLL (for the
clocks), Memory Mapping control registers to map SRAM to 0x0, and
Memory Acceleration Module (MAM). The details of the early hardware
startup may be found in the header cyg/hal/hal_platform_setup.h.
Linker Scripts and Memory Maps
The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:
- on-chip Flash
- This is located at address 0x0 of the memory space, although after hardware initialization, the start of internal SRAM is mapped over locations 0x0 to 0x40. The size of this region depends on the LPC2xxx microcontroller variant in use. In the case of the LPC2148, the region is of size 512Kbytes, ending at 0x80000. However the last few blocks of Flash are reserved for use as bootblocks for the ISP/IAP firmware, resulting in a usable Flash size of 500Kbytes, ending at 0x7d000. The MAM is enabled to accelerate memory reads from this area.
- internal SRAM
- This is located at address 0x40000000 of the memory space, and is 16, 32 or 64k in size, depending on the chip fitted. The first 64 bytes are mapped to location 0x0000000. If using GDB stubs ROM, or another ROM monitor, the virtual vector table starts at 0x40000050 and extends to 0x40000150. The remainder of SRAM is available for use by applications. For RAM startup applications, SRAM below 0x40001000 is reserved for the GDB stubrom and the remainder is available for the application. An exception is if the on-chip Flash driver is to be used. In that case, the top 32 bytes of SRAM are used by it. This is automatically handled in the port's memory layout files if the flash driver is present in the configuration.
- on-chip peripherals
- These are accessible at location 0xE0000000 onwards. Descriptions of the contents can be found in the LPC2xxx User Manual for the appropriate microcontroller variant.
Real-time characterization
The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM mode, which provided better performance than Thumb mode.
Example 244.1. ea_quickstart Real-time characterization
Startup, main stack : stack used 420 size 3920
Startup : Interrupt stack used 148 size 4096
Startup : Idlethread stack used 88 size 2048
eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated
Reading the hardware clock takes 0 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took 15.31 microseconds (9 raw clock ticks)
Testing parameters:
Clock samples: 32
Threads: 1
Thread switches: 128
Mutexes: 32
Mailboxes: 21
Semaphores: 32
Scheduler operations: 128
Counters: 32
Flags: 32
Alarms: 32
Confidence
Ave Min Max Var Ave Min Function
====== ====== ====== ====== ========== ========
15.00 15.00 15.00 0.00 100% 100% Create thread
5.00 5.00 5.00 0.00 100% 100% Yield thread [all suspended]
3.33 3.33 3.33 0.00 100% 100% Suspend [suspended] thread
5.00 5.00 5.00 0.00 100% 100% Resume thread
6.67 6.67 6.67 0.00 100% 100% Set priority
1.67 1.67 1.67 0.00 100% 100% Get priority
11.67 11.67 11.67 0.00 100% 100% Kill [suspended] thread
3.33 3.33 3.33 0.00 100% 100% Yield [no other] thread
6.67 6.67 6.67 0.00 100% 100% Resume [suspended low prio] thread
5.00 5.00 5.00 0.00 100% 100% Resume [runnable low prio] thread
6.67 6.67 6.67 0.00 100% 100% Suspend [runnable] thread
5.00 5.00 5.00 0.00 100% 100% Yield [only low prio] thread
5.00 5.00 5.00 0.00 100% 100% Suspend [runnable->not runnable]
11.67 11.67 11.67 0.00 100% 100% Kill [runnable] thread
8.33 8.33 8.33 0.00 100% 100% Destroy [dead] thread
16.67 16.67 16.67 0.00 100% 100% Destroy [runnable] thread
25.00 25.00 25.00 0.00 100% 100% Resume [high priority] thread
1.41 0.00 1.67 0.44 84% 15% Scheduler lock
3.49 3.33 5.00 0.28 90% 90% Scheduler unlock [0 threads]
3.49 3.33 5.00 0.28 90% 90% Scheduler unlock [1 suspended]
3.41 3.33 5.00 0.15 95% 95% Scheduler unlock [many suspended]
3.52 3.33 5.00 0.32 89% 89% Scheduler unlock [many low prio]
1.82 1.67 3.33 0.28 90% 90% Init mutex
4.38 3.33 5.00 0.78 62% 37% Lock [unlocked] mutex
5.00 5.00 5.00 0.00 100% 100% Unlock [locked] mutex
4.11 3.33 5.00 0.83 53% 53% Trylock [unlocked] mutex
3.80 3.33 5.00 0.67 71% 71% Trylock [locked] mutex
1.35 0.00 1.67 0.51 81% 18% Destroy mutex
21.67 21.67 21.67 0.00 100% 100% Unlock/Lock mutex
1.98 1.67 3.33 0.51 80% 80% Create mbox
1.19 0.00 1.67 0.68 71% 28% Peek [empty] mbox
4.60 3.33 5.00 0.61 76% 23% Put [first] mbox
1.43 0.00 1.67 0.41 85% 14% Peek [1 msg] mbox
4.52 3.33 5.00 0.68 71% 28% Put [second] mbox
0.87 0.00 1.67 0.83 52% 47% Peek [2 msgs] mbox
4.76 3.33 5.00 0.41 85% 14% Get [first] mbox
4.76 3.33 5.00 0.41 85% 14% Get [second] mbox
4.05 3.33 5.00 0.82 57% 57% Tryput [first] mbox
3.89 3.33 5.00 0.74 66% 66% Peek item [non-empty] mbox
4.29 3.33 5.00 0.82 57% 42% Tryget [non-empty] mbox
3.81 3.33 5.00 0.68 71% 71% Peek item [empty] mbox
4.05 3.33 5.00 0.82 57% 57% Tryget [empty] mbox
1.35 0.00 1.67 0.51 80% 19% Waiting to get mbox
1.43 0.00 1.67 0.41 85% 14% Waiting to put mbox
2.30 1.67 3.33 0.79 61% 61% Delete mbox
15.00 15.00 15.00 0.00 100% 100% Put/Get mbox
1.72 1.67 3.33 0.10 96% 96% Init semaphore
3.91 3.33 5.00 0.75 65% 65% Post [0] semaphore
3.96 3.33 5.00 0.78 62% 62% Wait [1] semaphore
3.91 3.33 5.00 0.75 65% 65% Trywait [0] semaphore
3.75 3.33 5.00 0.63 75% 75% Trywait [1] semaphore
1.72 1.67 3.33 0.10 96% 96% Peek semaphore
1.46 0.00 1.67 0.36 87% 12% Destroy semaphore
13.91 13.33 15.00 0.75 65% 65% Post/Wait semaphore
1.93 1.67 3.33 0.44 84% 84% Create counter
1.46 0.00 1.67 0.36 87% 12% Get counter value
1.35 0.00 1.67 0.51 81% 18% Set counter value
4.32 3.33 5.00 0.80 59% 40% Tick counter
1.46 0.00 1.67 0.36 87% 12% Delete counter
1.72 1.67 3.33 0.10 96% 96% Init flag
4.06 3.33 5.00 0.82 56% 56% Destroy flag
3.59 3.33 5.00 0.44 84% 84% Mask bits in flag
4.06 3.33 5.00 0.82 56% 56% Set bits in flag [no waiters]
5.63 5.00 6.67 0.78 62% 62% Wait for flag [AND]
5.63 5.00 6.67 0.78 62% 62% Wait for flag [OR]
5.57 5.00 6.67 0.75 65% 65% Wait for flag [AND/CLR]
5.52 5.00 6.67 0.72 68% 68% Wait for flag [OR/CLR]
1.35 0.00 1.67 0.51 81% 18% Peek on flag
2.86 1.67 3.33 0.67 71% 28% Create alarm
6.61 5.00 6.67 0.10 96% 3% Initialize alarm
3.91 3.33 5.00 0.75 65% 65% Disable alarm
6.15 5.00 6.67 0.72 68% 31% Enable alarm
4.38 3.33 5.00 0.78 62% 37% Delete alarm
4.95 3.33 5.00 0.10 96% 3% Tick counter [1 alarm]
23.33 23.33 23.33 0.00 100% 100% Tick counter [many alarms]
8.28 6.67 8.33 0.10 96% 3% Tick & fire counter [1 alarm]
138.96 138.33 140.00 0.78 62% 62% Tick & fire counters [>1 together]
26.88 26.67 28.33 0.36 87% 87% Tick & fire counters [>1 separately]
15.00 15.00 15.00 0.00 100% 100% Alarm latency [0 threads]
15.00 15.00 15.00 0.00 100% 100% Alarm latency [many threads]
26.69 26.67 30.00 0.05 99% 99% Alarm -> thread resume latency
3.38 3.33 5.00 0.00 Clock/interrupt latency
8.33 8.33 8.33 0.00 Clock DSR latency
312 312 312 (main stack: 716) Thread stack used (1360 total)
All done, main stack : stack used 716 size 3920
All done : Interrupt stack used 204 size 4096
All done : Idlethread stack used 256 size 2048
Timing complete - 23650 ms total
PASS:<Basic timing OK>
EXIT:<done>LED use
LEDs are available on the Prototype board. Most of these are attached to lines associated with peripherals present on the Prototype board, or the QuickStart board itself. However 9 LEDS are available for application use from C. The following C function may be used:
#include <cyg/infra/hal_diag.h> extern void hal_diag_led(int leds);
Values from 0 to 511 will be displayed on the LED bank representing the binary value with 1 being on and 0 being off. The LEDs used are connected to P0.10-P0.13 and P0.17-P0.21, and with P0.21 being the MSB, and P0.10 the LSB.
The LEDs are also used during platform initialization and only P0.10 should be illuminated if booting has been successful. Other LED indications represent the stage in the initialization process that failed.
Other Issues
The following pin assignments are configured by default for LPC2148 at board initialisation time:
PINSEL0:
P0.0/P0.1 for UART0
P0.2/P0.3 for I²C
P0.4/P0.5/P0.6 for SPI
P0.7 as PWM2 for buzzer on Prototype board
P0.8/P0.9 for UART1 (which is available on prototype board)
P0.10-P0.13 as GPIO-controlled LEDs
P0.14 EINT1 (available as button on prototype board)
P0.15 EINT2 (available as button on prototype board)
PINSEL1:
P0.16 EINT0 (available as button on prototype board)
P0.17-P0.21 as GPIO-controlled LEDs
P0.22 as GPIO output for SPI_SEL_MMC on prototype board
P0.23 as GPIO output for SPI_SEL_LED on prototype board
P0.29 as GPIO input for MMC/SD card detect on prototype board
P0.30 as EINT3 (available as button on prototype board)
(rather than GPIO input for SD write protect on prototype board)
All other pins set as GPIO inputs
PINSEL2:
P1.26-P1.31 for JTAG
All other pins set as inputs
| |  | |
| Configuration |  | Chapter 245. IAR KickStart Card Support |
| 2024-03-18 | eCosPro Non-Commercial Public License |