| TSC ADC Driver | ||
|---|---|---|
 | Chapter 80. TSC ADC Driver |  |
Name
TSC — ADC Driver
Description
This driver supports the Touch Screen Controller device available in some variants of the Freescale i.MXxx family of microprocessors.
In addition to the TSC device itself, this driver uses GPT1 to provide the data rate clock.
Sample Size
The TSC ADC produces 12 bit samples. Therefore this driver sets
CYGNUM_IO_ADC_SAMPLE_SIZE to 12. This will cause
the generic layer to define cyg_adc_sample_t as a 16 bit
value.
Sample Rates
The ADC collects samples from the inputs sequentially. For the three inputs this driver currently supports (INAUX0, INAUX1 and INAUX2) it takes about 40us to collect all samples. Therefore the hardware is limited to a maximum rate of about 25KHz.
The option CYGNUM_DEVS_ADC_ARM_TSC_DEFAULT_RATE
defines a default sample rate and is initially set to 500.
Configuration
For each channel X supported the CDL script provides the following configuration options:
- cdl_component CYGPKG_DEVS_ADC_ARM_TSC_CHANNELX
- This defines whether the channel N is included.
- cdl_option CYGDAT_DEVS_ADC_ARM_TSC_CHANNELN_NAME
-
This defines the name of the channel
N. By default the channels are named
"/dev/inauxN". - cdl_option CYGNUM_DEVS_ADC_ARM_TSC_CHANNELX_BUFSIZE
- This defines the size of the channel's sample buffer, in samples.
| |  | |
| Chapter 80. TSC ADC Driver |  | Chapter 81. Atmel AFEC (ADC) Driver |
| 2024-12-10 | eCosPro Non-Commercial Public License |