STM32 — ADC Driver
This driver supports the ADC devices available in some variants of the ST STM32 family of microprocessors.
The STM32 ADC on F1 series devices produces 12-bit samples. The F2/F4/F7/L4
series devices can produce 12-, 10-, 8- or 6-bit
samples and the H7 family can additionally produce 14- and 16-bit samples.
CDL configuration option allows the sample width to be set for
suitable variants. The default is for 12-bit samples, which will cause
the generic layer to define cyg_adc_sample_t as a 16-bit
The ADC hardware is limited to a maximum of 2K samples per channel. Since up to 16 channels are sampled on a round-robin basis, this means that the total sample rate can be 16K samples per second.
specifies the divider used to control the ADC system clock
supplied by the RCC.
If system instrumentation is enabled then
option is made available, and can be enabled to allow the ADC
device driver to generate instrumentation. When enabed the
control which events are generated.
Each ADC device is controlled by a CDL component,
CYGHWR_DEVS_ADC_CORTEXM_STM32_ADCX for each
device X, which must be enabled to initialize
the device. For STM32F1 devices only ADC devices 1 and 3 are
available, since ADC2 shares GPIO lines and an interrupt with
ADC1. For STM32F2/F4/F7/H7 devices ADC devices 1, 2 and 3 are available.
For STM32F2/F4/F7/L4/H7 devices the selection of the
TRGO event to be used for the specific
ADC device is controlled by a CDL component,
CYGHWR_DEVS_ADC_CORTEXM_STM32_ADC for each
For STM32F2/F4/F7/L4/H7 devices the selection of the DMA stream interrupt to
be used for the specific ADC device is controlled by a CDL
CYGHWR_DEVS_ADC_CORTEXM_STM32_ADCX_DMA for each
device X, which must be configured to avoid
clashes with other peripherals that may share the same DMA stream.
defines the duration over which each sample is taken for each
channel, in microseconds.
the default sample rate for all channels attached to device
defines the DMA interrupt prioirity for this device. The default
of 0x80 sets it in the middle of the prioirity range.
For each channel X in ADC device Y the CDL script provides the following configuration options:
- If the application needs to access the on-chip ADC channel X via an eCos ADC driver then this option should be enabled.
- This option controls the name that an eCos application should use to access this device via cyg_io_lookup(), open(), or similar calls.
- This defines the size of the channel's sample buffer, in samples.
|2022-01-07||eCosPro Non-Commercial Public License|