Atmel AFEC ADC Driver
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Name

Atmel — ADC Driver

Description

This driver supports the AFE (Analog Front-End) Controller available in some Atmel microprocessor variants, e.g. the SAM4E family.

Sample Size

The Atmel AFEC natively supports 12-bit samples, but via digital averaging 13-, 14-, 15- and 16-bit samples are supported. The controller also supports “low-resolution” 10-bit samples, but at the same sampling rate as the native 12-bit samples. When higher resolution, averaged, samples are used the maximum achievable sample rate will be lower than the native resolution. The per-controller CYGNUM_DEVS_ADC_ATMEL_AFECx_RESOLUTION configuration option specifies the sample resolution to be used.

This driver left-aligns results so that the full-range of the ADC I/O generic layer defined cyg_adc_sample_t type is used regardless of the resolution configured for this driver. The default generic layer CYGNUM_IO_ADC_SAMPLE_SIZE definition of 16 should be sufficient for most applications.

Configuration

If system instrumentation is enabled then the CYGIMP_DEVS_ADC_ATMEL_AFEC_INSTRUMENTATION option is made available, and can be enabled to allow the ADC device driver to generate instrumentation. When enabed the sub-options CYGDBG_DEVS_ADC_ATMEL_AFEC_INSTRUMENT_CONTROL and CYGDBG_DEVS_ADC_ATMEL_AFEC_INSTRUMENT_DMA control which events are generated.

Each ADC device is controlled by a CDL component, CYGHWR_DEVS_ADC_ATMEL_AFECx for each device x, which must be enabled to initialize the device. The number of channels available to a controller instance is defined by the relevant variant or platform HAL as required.

The option CYGNUM_DEVS_ADC_ATMEL_AFECx_RESOLUTION defines the internal sample size.

The option CYGNUM_DEVS_ADC_ATMEL_AFECx_OFFSET defines the channel offset compensation applied to all channels..

The option CYGNUM_DEVS_ADC_ATMEL_AFECx_DEFAULT_RATE defines the default samples-per-second rate for all channels attached to device x. This default can be over-ridden at run-time using the generic ADC I/O layer provided support as required.

For each channel x in an AFEC device y the CDL script provides the following configuration options:

CYGHWR_DEVS_ADC_ATMEL_AFECy_CHANNELx
If the application needs to access the on-chip ADC channel x via an eCos ADC driver then this option should be enabled.
CYGDAT_DEVS_ADC_ATMEL_AFECy_CHANNELx_NAME
This option controls the name that an eCos application should use to access this device via cyg_io_lookup(), open(), or similar calls. This allows meaningful names to be assigned if required, rather than the default “/dev/adcyx” style.
CYGDAT_DEVS_ADC_ATMEL_AFECy_CHANNELx_INPUT
By default input channels are configured in single-ended mode, which is the normal acquisition mode. This option allows individual channels to be configured in Differential mode, where the input is generated against an adjacent “paired” channel.
CYGDAT_DEVS_ADC_ATMEL_AFECy_CHANNELx_BUFSIZE
This defines the size of the channel's sample buffer, in cyg_adc_sample_t samples.
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