|Debugging with GDB: MIPS Register packet Format|
G packets have previously been defined.
In the below, some thirty-two bit registers are transferred as
sixty-four bits. Those registers should be zero/sign extended (which?)
to fill the space allocated. Register bytes are transferred in target
byte order. The two nibbles within a register byte are transferred
most-significant – least-significant.
All registers are transferred as thirty-two bit quantities in the order: 32 general-purpose; sr; lo; hi; bad; cause; pc; 32 floating-point registers; fsr; fir; fp.
All registers are transferred as sixty-four bit quantities (including
thirty-two bit registers such as
sr). The ordering is the same